參數(shù)資料
型號(hào): PIC16LC782T-I/SS
廠(chǎng)商: Microchip Technology
文件頁(yè)數(shù): 105/186頁(yè)
文件大?。?/td> 0K
描述: IC MCU OTP 2KX14 A/D D/A 20SSOP
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲(chǔ)器容量: 3.5KB(2K x 14)
程序存儲(chǔ)器類(lèi)型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b; D/A 1x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
其它名稱(chēng): PIC16LC782TI/SS
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2001 Microchip Technology Inc.
Preliminary
DS41171A-page 23
PIC16C781/782
2.9
PCL and PCLATH
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13-bits
wide. The low byte is called the PCL register. This reg-
ister is readable and writable. The high byte is called
the PCH register. This register contains the PC<12:8>
bits and is not directly readable or writable. All updates
to the PCH register occur through the PCLATH register.
2.9.1
PROGRAM MEMORY PAGING
PIC16C781/782 devices are capable of addressing a
continuous 8K word block of program memory. The
CALL
and GOTO instructions provide only 11 bits of
address to allow branching within any 2K program
memory page. When performing a CALL or GOTO
instruction, the upper 2 bits of the address are provided
by PCLATH<4:3>. When performing a CALL or GOTO
instruction, the user must ensure that the page select
bits are programmed so that the desired program mem-
ory page is addressed. A return instruction pops a PC
address off the stack onto the PC register. Therefore,
manipulation of the PCLATH<4:3> bits is not required
for the return instructions (which POPs the address
from the stack).
2.10
Stack
The stack allows a combination of up to 8 program calls
and interrupts to occur. The stack contains the return
address from this branch in program execution.
Mid-range devices have an 8-level deep x 13-bit wide
hardware stack. The stack space is not part of either
program or data space and the stack pointer is not
readable or writable. The PC is PUSHed onto the stack
when a CALL instruction is executed, or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN, RETLW,
or a RETFIE instruction execution.
PCLATH is not modified when the stack is PUSHed or
POPed.
After the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
2.11
INDF
The INDF register is not a physical register. Addressing
INDF actually addresses the register whose address is
contained in the FSR register (FSR is a pointer). This is
known as indirect addressing.
Reading INDF itself, indirectly (FSR = 0), produces
00h. Writing to the INDF register indirectly results in a
no operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-1.
EXAMPLE 2-1:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
movlw
0x20
;initialize pointer
movwf
FSR
;
to RAM
NEXT
clrf
INDF
;clear INDF register
incf
FSR
;inc pointer
btfss
FSR,4 ;all done?
goto
NEXT
;NO, clear next
CONTINUE
:
;YES, continue
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-5.
FIGURE 2-4:
LOADING OF PC IN
DIFFERENT SITUATIONS
Instruction with
PCL as
Destination
8
ALU
12
0
11
Opcode <10:0>
GOTO, CALL
PCLATH<4:3>
PCLATH
87
PCLATH<4:0>
12
1110
8 7
0
PCH
PCL
PCH
PCL
5
2
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