參數(shù)資料
型號: PIC17C756A-16I/L
廠商: Microchip Technology
文件頁數(shù): 130/159頁
文件大?。?/td> 0K
描述: IC MCU OTP 16KX16 A/D PWM 68PLCC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 19
系列: PIC® 17C
核心處理器: PIC
芯體尺寸: 8-位
速度: 16MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 50
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: OTP
RAM 容量: 902 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-LCC(J 形引線)
包裝: 管件
配用: AC164308-ND - MODULE SKT FOR PM3 68PLCC
DVA17XL681-ND - DEVICE ADAPTER FOR PIC17C752
DM173001-ND - KIT DEVELOPMENT PICDEM17
AC174007-ND - MODULE SKT PROMATEII 68PLCC
AC164024-ND - ADAPTER PICSTART PLUS 68PLCC
2000 Microchip Technology Inc.
DS30289B-page 71
PIC17C7XX
10.0
I/O PORTS
PIC17C75X devices have seven I/O ports, PORTA
through PORTG. PIC17C76X devices have nine I/O
ports, PORTA through PORTJ. PORTB through
PORTJ have a corresponding Data Direction Register
(DDR), which is used to configure the port pins as
inputs or outputs. Some of these ports pins are multi-
plexed with alternate functions.
PORTC, PORTD, and PORTE are multiplexed with the
system bus. These pins are configured as the system
bus when the device’s configuration bits are selected to
Microprocessor or Extended Microcontroller modes. In
the two other microcontroller modes, these pins are
general purpose I/O.
PORTA, PORTB, PORTE<3>, PORTF, PORTG and
the upper four bits of PORTH are multiplexed with the
peripheral features of the device. These peripheral fea-
tures are:
Timer Modules
Capture Modules
PWM Modules
USART/SCI Modules
SSP Module
A/D Module
External Interrupt pin
When some of these peripheral modules are turned on,
the port pin will automatically configure to the alternate
function. The modules that do this are:
PWM Module
SSP Module
USART/SCI Module
When a pin is automatically configured as an output by
a peripheral module, the pins data direction (DDR) bit
is unknown. After disabling the peripheral module, the
user should re-initialize the DDR bit to the desired con-
figuration.
The other peripheral modules (which require an input)
must have their data direction bits configured appropri-
ately.
When the device enters the “RESET state”, the Data
Direction registers (DDR) are forced set, which will
make the I/O hi-impedance inputs. The RESET state of
some peripheral modules may force the I/O to other
operations, such as analog inputs or the system bus.
Note:
A pin that is a peripheral input, can be con-
figured as an output (DDRx<y> is cleared).
The peripheral events will be determined
by the action output on the port pin.
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