參數(shù)資料
型號: PIC17C756A-16I/L
廠商: Microchip Technology
文件頁數(shù): 5/159頁
文件大?。?/td> 0K
描述: IC MCU OTP 16KX16 A/D PWM 68PLCC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 19
系列: PIC® 17C
核心處理器: PIC
芯體尺寸: 8-位
速度: 16MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 50
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: OTP
RAM 容量: 902 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-LCC(J 形引線)
包裝: 管件
配用: AC164308-ND - MODULE SKT FOR PM3 68PLCC
DVA17XL681-ND - DEVICE ADAPTER FOR PIC17C752
DM173001-ND - KIT DEVELOPMENT PICDEM17
AC174007-ND - MODULE SKT PROMATEII 68PLCC
AC164024-ND - ADAPTER PICSTART PLUS 68PLCC
Section 3 Floating-Point Unit (FPU)
Page 70 of 1336
R01UH0025EJ0300 Rev. 3.00
Sep 24, 2010
SH7261 Group
31
30
23
22
0
x
N = 1: sNaN
N = 0: qNaN
11111111
Nxxxxxxxxxxxxxxxxxxxxxx
Figure 3.3 Single-Precision NaN Bit Pattern
An sNaN is input in an operation, except copy, FABS, and FNEG, that generates a floating-point
value.
When the EN.V bit in FPSCR is 0, the operation result (output) is a qNaN.
When the EN.V bit in FPSCR is 1, an invalid operation exception will generate FPU exception
processing. In this case, the contents of the operation destination register are unchanged.
If a qNaN is input in an operation that generates a floating-point value, and an sNaN has not been
input in that operation, the output will always be a qNaN irrespective of the setting of the EN.V bit
in FPSCR. An exception will not be generated in this case.
The qNAN values as operation results are as follows:
Single-precision qNaN: H'7FBF FFFF
Double-precision qNaN: H'7FF7 FFFF FFFF FFFF
See the individual instruction descriptions for details of floating-point operations when a non-
number (NaN) is input.
3.2.3
Denormalized Numbers
For a denormalized number floating-point value, the exponent field is expressed as 0, and the
fraction field as a non-zero value.
In the SH2A-FPU, the DN bit in the status register FPSCR is always set to 1, therefore a
denormalized number (source operand or operation result) is always flushed to 0 in a floating-
point operation that generates a value (an operation other than copy, FNEG, or FABS).
When the DN bit in FPSCR is 0, a denormalized number (source operand or operation result) is
processed as it is. See the individual instruction descriptions for details of floating-point
operations when a denormalized number is input.
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