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參數(shù)資料
| 型號(hào)： | PIC876 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 28/40-pin 8-Bit CMOS FLASH Microcontrollers |
| 中文描述： | 28/40-pin 8位CMOS閃存微控制器 |
| 文件頁(yè)數(shù)： | 36/200頁(yè) |
| 文件大?。?/td> | 3544K |
| 代理商： | PIC876 |
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PIC16F87X
DS30292B-page 36
1999 Microchip Technology Inc.
3.5
PORTE and TRISE Register
This section is not applicable to the PIC16F873 or
PIC16F876.
PORTE has three pins, RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs). Ensure ADCON1 is configured for digital I/O. In
this mode, the input buffers are TTL.
Register 3-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
selected as an analog input, these pins will read as ’0’s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
FIGURE 3-8:
PORTE BLOCK DIAGRAM (IN
I/O PORT MODE)
REGISTER 3-1:
TRISE REGISTER (ADDRESS 89h)
Note:
On a Power-on Reset, these pins are con-
figured as analog inputs.
Data
Bus
WR
PORT
WR
TRIS
RD PORT
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
input
buffer
Q
D
CK
Q
D
CK
EN
Q
D
EN
I/O pin
(1)
Note 1:
I/O pins have protection diodes to V
DD
and V
SS
.
R-0
IBF
bit7
R-0
OBF
R/W-0
IBOV
R/W-0
PSPMODE
U-0
—
R/W-1
bit2
R/W-1
bit1
R/W-1
bit0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n= Value at POR reset
Parallel Slave Port Status/Control Bits
IBF:
Input Buffer Full Status bit
1
= A word has been received and is waiting to be read by the CPU
0
= No word has been received
OBF
: Output Buffer Full Status bit
1
= The output buffer still holds a previously written word
0
= The output buffer has been read
IBOV
: Input Buffer Overflow Detect bit (in microprocessor mode)
1
= A write occurred when a previously input word has not been read (must be cleared in software)
0
= No overflow occurred
PSPMODE
: Parallel Slave Port Mode Select bit
1
= Parallel slave port mode
0
= General purpose I/O mode
Unimplemented
: Read as ’0’
PORTE Data Direction Bits
Bit2
: Direction Control bit for pin RE2/CS/AN7
1
= Input
0
= Output
Bit1
: Direction Control bit for pin RE1/WR/AN6
1
= Input
0
= Output
Bit0
: Direction Control bit for pin RE0/RD/AN5
1
= Input
0
= Output
bit 7 :
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
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