Figure 11. V
參數(shù)資料
型號(hào): PPC5604BCLL64
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 56/109頁(yè)
文件大?。?/td> 0K
描述: MCU 32BIT 512K 64MHZ
標(biāo)準(zhǔn)包裝: 90
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 64MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 4K x 16
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 28x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤(pán)
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Package pinouts and signal descriptions
Freescale Semiconductor
50
Figure 11. VDD_HV and VDD_BV maximum slope
When STANDBY mode is used, further constraints are applied to the both VDD_HV and VDD_BV in order to guarantee correct
regulator function during STANDBY exit. This is described on Figure 12.
STANDBY regulator constraints should normally be guaranteed by implementing equivalent of CSTDBY capacitance on
application board (capacitance and ESR typical values), but would actually depend on exact characteristics of application
external regulator.
VDD_HV
t
d
d VDD
POWER UP
POWER DOWN
VDD_HV(MAX)
FUNCTIONAL RANGE
VDD_HV(MIN)
VDD_HV
t
d
d VDD
POWER UP
POWER DOWN
VDD_HV(MAX)
FUNCTIONAL RANGE
VPORH(MAX)
相關(guān)PDF資料
PDF描述
PPC5606BCLU64 MCU 32BIT 1M 64MHZ
PPC8309VMAGDCA MPU POWERQUICC II PRO 489-MAP
PS302CSA IC SWITCH SPST 8SOIC
PS321CPA IC SWITCH DUAL SPST 8DIP
PS323CUAEX IC ANLG SW SPST DUAL NO 8-MSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PPC5604BCLQ64 制造商:Freescale Semiconductor 功能描述:BOL 512K 3 CAN 64MHZ - Bulk
PPC5604BECLQ 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller
PPC5604BECLU 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller
PPC5604BECMG 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Microcontroller
PPC5604BEF1MLL 制造商:Freescale Semiconductor 功能描述: