參數(shù)資料
型號(hào): PPC5604BCLL64
廠商: Freescale Semiconductor
文件頁數(shù): 82/109頁
文件大?。?/td> 0K
描述: MCU 32BIT 512K 64MHZ
標(biāo)準(zhǔn)包裝: 90
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 64MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 4K x 16
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 28x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Package pinouts and signal descriptions
Freescale Semiconductor
74
3.26.3
ADC electrical characteristics
Table 43. ADC input leakage current
Symbol C
Parameter
Conditions
Value
Unit
Min
Typ
Max
ILKG CC D Input leakage current TA = 40 °C No current injection on adjacent pin
1
70
nA
DTA = 25 °C
1
70
DTA = 85 °C
3
100
DTA = 105 °C
8
200
PTA = 125 °C
45
400
Table 44. ADC conversion characteristics
Symbol
C
Parameter
Conditions1
Value
Unit
Min
Typ
Max
VSS_ADC SR — Voltage on
VSS_HV_ADC (ADC
reference) pin with
respect to ground
(VSS)2
0.1
0.1
V
VDD_ADC SR — Voltage on
VDD_HV_ADC pin
(ADC reference) with
respect to ground
(VSS)
—VDD0.1
VDD+0.1
V
VAINx SR — Analog input voltage3
—VSS_ADC0.1 — VDD_ADC+0.1 V
fADC
SR — ADC analog frequency
6
32 + 4%
MHz
ADC_SYS SR — ADC digital clock duty
cycle (ipg_clk)
ADCLKSEL = 14
45
55
%
IADCPWD SR — ADC0 consumption in
power down mode
——
50
A
IADCRUN SR — ADC0 consumption in
running mode
——
4
mA
tADC_PU SR — ADC power up delay
1.5
s
ts
CC T Sampling time5
fADC = 32 MHz, INPSAMP = 17
0.5
s
fADC = 6 MHz, INPSAMP = 255
42
tc
CC P Conversion time6
fADC = 32 MHz, INPCMP = 2
0.625
s
CS
CC D ADC input sampling
capacitance
——
3
pF
CP1
CC D ADC input pin
capacitance 1
——
3
pF
CP2
CC D ADC input pin
capacitance 2
——
1
pF
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