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參數(shù)資料
| 型號： | PPC5604BCLL64 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 8/109頁 |
| 文件大?。?/td> | 0K |
| 描述： | MCU 32BIT 512K 64MHZ |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | MPC56xx Qorivva |
| 核心處理器： | e200z0h |
| 芯體尺寸： | 32-位 |
| 速度： | 64MHz |
| 連通性： | CAN，I²C，LIN，SCI，SPI |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 79 |
| 程序存儲器容量： | 512KB（512K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 16 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 28x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
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Document revision history
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Freescale Semiconductor
105
10
15 Oct 2012
Table 1 (MPC5604B/C device comparison), added footnote for MPC5603BxLH and
MPC5604BxLH about FlexCAN availability.
Table 2 (MPC5604B/C series block summary), replaced “System watchdog timer” with
“Software watchdog timer” and specified AUTOSAR (Automotive Open System
Architecture)
replaced footnote “Available only on MPC560xC versions and MPC5604B 208
MAPBGA devices” with “Available only on MPC560xC versions, MPC5603B 64 LQFP,
MPC5604B 64 LQFP and MPC5604B 208 MAPBGA devices”,
replaced VDD with VDD_HV
Figure 10 (Voltage regulator capacitance connection), updated pin name apperence
Renamed Figure 11 (VDD_HV and VDD_BV maximum slope) (was “VDD and VDD_BV
maximum slope”)
(was “VDD and VDD_BV supply constraints during STANDBY mode exit”)
Table 12 (Recommended operating conditions (3.3 V)), added minimum value of TVDD
and footnote about it.
Table 13 (Recommended operating conditions (5.0 V)), added minimum value of TVDD
and footnote about it.
replaced “slew rate of VDD/VDD_BV” with “slew rate of both VDD_HV and VDD_BV”
replaced “When STANDBY mode is used, further constraints apply to the VDD/VDD_BV
in order to guarantee correct regulator functionality during STANDBY exit.” with “When
STANDBY mode is used, further constraints are applied to the both VDD_HV and
VDD_BV in order to guarantee correct regulator function during STANDBY exit.”
Table 27 (Power consumption on VDD_BV and VDD_HV), updated footnotes of IDDMAX
and IDDRUN stating that both currents are drawn only from the VDD_BV pin.
Table 31 (Flash memory power supply DC electrical characteristics), in the paremeter
column replaced VDD_BV and VDD_HV respectively with VDD_BV and VDD_HV.
Table 45 (On-chip peripherals current consumption), in the paremeter column replaced
VDD_BV, VDD_HV and VDD_HV_ADC respectively with VDD_BV, VDD_HV and
VDD_HV_ADC
11
14 Nov 2012
In the cover feature list:
added “and ECC” at the end of “Up to 512 KB on-chip code flash supported with the
flash controller”
added “with ECC” at the end of “Up to 48 KB on-chip SRAM”
Table 12 (Recommended operating conditions (3.3 V)), removed minimum value of TVDD
and relative footnote.
Table 13 (Recommended operating conditions (5.0 V)), removed minimum value of TVDD
and relative footnote.
11.1
08 October 2013 Deleted the second erroneous device-comparison table.
Table 49. Revision history (continued)
Revision
Date
Description of Changes
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