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參數(shù)資料
| 型號： | PSD503B1 |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有61個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設備（可編程邏輯，16K的位的SRAM，40余個可編程輸入/輸出，通用PLD的有61個輸入） |
| 文件頁數(shù)： | 38/130頁 |
| 文件大?。?/td> | 704K |
| 代理商： | PSD503B1 |
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PSD5XX Famly
6-38
Address Out
For microcontrollers with a multiplexed address/data bus, the I/O ports in Address-Out
mode are able to provide latched address outputs (A0 – A15) to external devices. This
mode of operation requires the user to:
J
Configuration
1.Declare the pins used as address line outputs in the ABEL file PSDsoft.
2.Write “0” to the corresponding bit in the Control Register associated
with each I/O port.
3.Set the Direction Register to Output Mode.
Address In
1. For Port A – as other address line (A2 – A7 and A16 – A23) inputs to the DPLD.
Additional address inputs included in the EPROM decoding must come from Port A.
The address inputs are latched internally by ALE/AS if Multiplexed Bus is specified in
PSDsoft.
2. For Ports C and D – as adress inputs to the ZPLD for general decoding, should not be
used in EPROM decoding.
J
Configuration
1.Declare pins or signals used as Address In in the ABEL file (PSDsoft).
2.Write latch equations in the ABL file, e.g., A16.LE = ALE
3.Include latched address in logic equations.
Data Port
In this mode, the port is acting as a data bus port for a microcontroller which has a
non-multiplexed address/data bus. In this configuration, the Data Port is connected to the
data bus of the microcontroller and the ADIO port is connected to the address bus.
J
Configuration
Select the non-multiplexed bus option in PSD configuration (PSDsoft).
Special Function Out
This mode is per-pin configurable. When enabled, the special function assigned to the
particular pin is driven out. Special functions consist of Timer and Interrupt outputs.
J
Configuration
1.Specify the output function in the PSD configuration (PSDsoft).
2.PSD compiler assigns pins for the selected function.
3.Write “1” to the corresponding bit in the Special Function Register.
I/OPorts
(Cont.)
相關PDF資料 |
PDF描述 |
|---|---|
| PSD502B1-12U | 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-204AE package; Similar to IRH7250 with optional Total Dose Rating of 1000kRads |
| PSD502B1-12UI | 250V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a TO-254AA package; A IRHM57264SE with Standard Packaging |
| PSD502B1-15J | 600V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-257AA package. Also available in Radiation Levels up to 300KRad.; Similar to IRHY67C30CM with Optional Total Dose Rating of 300kRads |
| PSD502B1-15JI | 30V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-257AA package; Similar to IRHY57Z30CM with optional Total Dose Rating of 300kRads |
| PSD502B1-15LI | 30V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-257AA package; A IRHY57Z30CM with Standard Packaging |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PSD503B1-12J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD503B1-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD503B1-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD503B1-12U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD503B1-12UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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