參數(shù)資料
型號： PSD813F5V
英文描述： -60V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHNA9064 with optional Total Dose Rating of 300kRads
中文描述： Flash在系統(tǒng)編程（ISP）外設(shè)的8位微控制器
文件頁數(shù)： 43/103頁
文件大小： 1185K
代理商： PSD813F5V
43/103
PSD81XFX, PSD83XF2, PSD85XF2
MCU Bus Interface Examples
Figure 19 to Figure 22 show examples of the basic
connections between the PSD8XXFX and some
popular MCUs. The PSD8XXFX Control input pins
are labeled as to the MCU function for which they
are configured. The MCU bus interface is specified
using the PSDsoft Express Configuration.
80C31.
Figure 19 shows the bus interface for the
80C31, which has an 8-bit multiplexed address/
data bus. The lower address byte is multiplexed
with the data bus. The MCU control signals Pro-
gram Select Enable (PSEN, CNTL2), Read Strobe
(RD, CNTL1), and Write Strobe (WR, CNTL0) may
be used for accessing the internal memory and I/
O Ports blocks. Address Strobe (ALE/AS, PD0)
latches the address.
80C251.
The Intel 80C251 MCU features a user-
configurable bus interface with four possible bus
configurations, as shown in Table 17.
Figure 19. Interfacing the PSD8XXFX with an 80C31
Table 17. 80C251 Configurations
Configuration
80C251 READ/WRITE
Pins
Connecting to PSD8XXFX Pins
Page Mode
1
WR
RD
PSEN
CNTL0
CNTL1
CNTL2
Non-Page Mode, 80C31
compatible A7-A0 multiplex with
D7-D0
2
WR
PSEN only
CNTL0
CNTL1
Non-Page Mode
A7-A0 multiplex with D7-D0
3
WR
PSEN only
CNTL0
CNTL1
Page Mode
A15-A8 multiplex with D7-D0
4
WR
RD
PSEN
CNTL0
CNTL1
CNTL2
Page Mode
A15-A8 multiplex with D7-D0
EA/VP
X1
X2
RESET
RESET
INT0
INT1
T0
T1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
ADIO0
ADIO1
ADIO2
ADIO3
ADIO4
ADIO5
ADIO6
ADIO7
ADIO8
ADIO9
ADIO10
ADIO11
ADIO12
ADIO13
ADIO14
ADIO15
CNTL0(WR)
CNTL1(RD)
CNTL2(PSEN)
PD0-ALE
PD1
PD2
RESET
RD
WR
PSEN
ALE/P
TXD
RXD
RESET
29
28
27
25
24
23
22
21
30
31
32
33
34
35
36
37
39
38
37
36
35
34
33
32
31
19
18
9
12
13
14
15
1
2
3
4
5
6
7
8
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
39
40
41
42
43
44
45
46
47
50
48
49
10
9
8
7
6
5
4
3
2
52
51
PSD
80C31
AD7-AD0
AD[7:0]
21
22
23
24
25
26
27
28
17
16
29
30
A8
A9
A10
A11
A12
A13
A14
A15
RD
WR
PSEN
ALE
11
10
RESET
20
19
18
17
14
13
12
11
AI02880C
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