
3;%)
/LVWRI)LJXUHV
3DJH
Data Sheet
0-5
07.2000
Figure 1
Figure 2
Figure 3
Chipset Configuration for Main ATM Layer Functionality . . . . . . . . . . . . . . . . . . . 7
Chipset Configuration for Main ATM Layer Functionality Plus Full OAM . . . . . . . 8
Chipset Configuration for Main ATM Layer Functionality Plus Full OAM
and Arbitrary Header Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Miniswitch Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Line Card Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
CAME Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
CAME Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
ALP and CAME Application for 8k Connections . . . . . . . . . . . . . . . . . . . . . . . . .17
ALP and CAME Application for 16k Connections . . . . . . . . . . . . . . . . . . . . . . . .18
Block Diagram of the CAME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
State Diagram of Status Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Cascade Interface - Interconnection of 2 CAME Chips. . . . . . . . . . . . . . . . . . . .46
Clock Interface of the CAME. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Example for VBIAS Reference Voltage Circuit . . . . . . . . . . . . . . . . . . . . . . . . . .56
Input/Output Waveform for AC Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Boundary-Scan Test Interface Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . .60
Example of Execution Timing for Write Command (Request #4) . . . . . . . . . . . .61
CAME Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
CAME Write Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Timing of Cascade Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Sorts of Packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21