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28
élanSC400 Microcontroller Register Set Reference Manual Amendment
A M E N D M E N T
PMU Force Mode Register
22h/23h
Index 40h
5
Reserved on the
élanSC410 microcontroller
3-51
Wake-Up Source Enable
Register D
22h/23h
Index 55h
7–0
Reserved on the élanSC410 microcontroller
3-62
Wake-Up Source Status
Register D
22h/23h
Index 59h
7–0
Reserved on the élanSC410 microcontroller
3-66
Activity Source Enable
Register A
22h/23h
Index 62h
3–2
Reserved on the élanSC410 microcontroller
3-71
Activity Source Enable
Register D
22h/23h
Index 65h
6–1
Reserved on the élanSC410 microcontroller
3-74
Activity Source Status
Register A
22h/23h
Index 66h
3–2
Reserved on the élanSC410 microcontroller
3-75
Activity Source Status
Register D
22h/23h
Index 69h
6–1
Reserved on the élanSC410 microcontroller
3-78
Activity Classification
Register A
22h/23h
Index 6Ah
3–2
Reserved on the élanSC410 microcontroller
3-79
Activity Classification
Register D
22h/23h
Index 6Dh
6–1
Reserved on the élanSC410 microcontroller
3-82
CLK_IO Pin Output Clock
Select Register
22h/23h
Index 83h
3–0
0 0 1 0 = Reserved on the élanSC410 microcontroller
3-91
PC Card and Keyboard SMI/
NMI Enable Register
22h/23h
Index 91h
3–0
Reserved on the élanSC410 microcontroller
3-95
PC Card and Keyboard SMI/
NMI Status Register
22h/23h
Index 95h
3–0
Reserved on the élanSC410 microcontroller
3-100
SMI/NMI Select Register
22h/23h
Index 98h
5
Reserved on the élanSC410 microcontroller
3-104
I/O Access SMI Enable
Register A
22h/23h
Index 99h
3
Reserved on the élanSC410 microcontroller
3-105
I/O Access SMI Enable
Register B
22h/23h
Index 9Ah
4, 3
Reserved on the élanSC410 microcontroller
3-106
I/O Access SMI Status
Register A
22h/23h
Index 9Bh
3
Reserved on the élanSC410 microcontroller
3-107
I/O Access SMI Status
Register B
22h/23h
Index 9Ch
4, 3
Reserved on the élanSC410 microcontroller
3-108
Internal I/O Device Disable/
Echo Z-Bus Configuration
Register
22h/23h
Index D0h
1
This bit’s PC Card function is invalid on the élanSC410
microcontroller. However, this bit is shared by MMS
Windows and must be set (= 1) to enable
MMS Windows C–F setup.
3-165
DMA Resource Channel Map
Register B
22h/23h
Index DCh
3–0
Reserved on the élanSC410 microcontroller
3-178
Internal Graphics Control
Register A
22h/23h
Index DDh
7–0
Reserved on the élanSC410 microcontroller
3-179
Internal Graphics Control
Register B
22h/23h
Index DEh
7–0
Reserved on the élanSC410 microcontroller
3-180
Suspend Pin State Register A
22h/23h
Index E3h
7, 6
Reserved on the élanSC410 microcontroller
3-184
Table 2.
Register Set Manual Differences for élanSC410 Microcontroller (Continued)
Register
I/O Address
Bits
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