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Datasheet
3
Intel
Pentium
III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
Contents
1.0
Introduction.........................................................................................................................7
1.1
Terminology...........................................................................................................8
1.1.1
Package and Processor Terminology ......................................................8
1.1.2
Processor Naming Convention.................................................................9
1.2
Related Documents.............................................................................................10
2.0
Electrical Specifications....................................................................................................11
2.1
Processor System Bus and V
REF
........................................................................11
2.2
Clock Control and Low Power States..................................................................12
2.2.1
Normal State—State 1 ...........................................................................13
2.2.2
AutoHALT Powerdown State—State 2...................................................13
2.2.3
Stop-Grant State—State 3 .....................................................................14
2.2.4
HALT/Grant Snoop State—State 4 ........................................................14
2.2.5
Sleep State—State 5..............................................................................14
2.2.6
Deep Sleep State—State 6 ....................................................................15
2.2.7
Clock Control..........................................................................................15
2.3
Power and Ground Pins......................................................................................16
2.3.1
Phase Lock Loop (PLL) Power...............................................................16
2.4
Decoupling Guidelines ........................................................................................17
2.4.1
Processor VCC
CORE
Decoupling............................................................17
2.5
Processor System Bus Clock and Processor Clocking.......................................17
2.6
Voltage Identification...........................................................................................18
2.7
Processor System Bus Unused Pins...................................................................21
2.8
Processor System Bus Signal Groups................................................................21
2.8.1
Asynchronous vs. Synchronous for System Bus Signals.......................22
2.8.2
System Bus Frequency Select Signals ..................................................23
2.9
Maximum Ratings................................................................................................24
2.10
Processor Voltage Level Specifications..............................................................24
2.11
AGTL System Bus Specifications........................................................................29
2.12
System Bus Timing Specifications......................................................................29
3.0
Signal Quality Specifications............................................................................................42
3.1
BCLK/BCLK# & PICCLK Signal Quality
Specifications and Measurement Guidelines......................................................42
3.2
AGTL Signal Quality Specifications and Measurement Guidelines.....................43
3.3
AGTL Signal Quality Specifications and Measurement Guidelines.....................44
3.3.1
Overshoot/Undershoot Guidelines.........................................................44
3.3.2
Overshoot/Undershoot Magnitude .........................................................45
3.3.3
Overshoot/Undershoot Pulse Duration...................................................45
3.3.4
Activity Factor.........................................................................................45
3.3.5
Reading Overshoot/Undershoot Specification Tables............................46
3.3.6
Determining if a System meets the
Overshoot/Undershoot Specifications....................................................47