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Datasheet
Intel
Pentium
III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
List of Tables
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Processor Identification.........................................................................................9
System Bus Clock in Deep Sleep Mode .............................................................15
Voltage Identification Definition .........................................................................19
System Bus Signal Groups.................................................................................22
Frequency Select Truth Table for BSEL[1:0] ......................................................23
Absolute Maximum Ratings ................................................................................24
Voltage and Current Specifications ....................................................................25
Power Supply Current Slew Rate (dIcc
core
/dt)....................................................26
Vcc Static & Transient Tolerance .......................................................................27
AGTL Signal Group Levels Specifications .........................................................28
Non-AGTL Signal Group Levels Specifications ..................................................28
3.3 Volt CMOS Output Signal Group DC Specifications.....................................29
Processor AGTL Bus Specifications ..................................................................29
System Bus Timing Specifications (Single-Ended Clock)...................................31
System Bus Timing Specifications (Differential Clock) .......................................32
System Bus Timing Specifications (AGTL Signal Group)...................................32
System Bus Timing Specifications (CMOS Signal Group)..................................33
System Bus Timing Specifications (Reset Conditions) ......................................34
System Bus Timing Specifications (APIC Clock and APIC I/O)..........................34
System Bus Timing Specifications (TAP Connection) ........................................35
Platform Power-On Timings................................................................................36
BCLK (Single-Ended Clock Mode) Signal Quality
Specifications for Simulation at the Processor Pins............................................42
BCLK/BCLK# (Differential Clock Mode) and PICCLK
Signal Quality Specifications for Simulation at the Processor Pins.....................42
AGTL Signal Groups Ringback Tolerance Specifications at the Processor Pins43
Example Platform Information.............................................................................46
133 MHz AGTL Signal Group Overshoot/Undershoot Tolerance .......................48
33 MHz CMOS Signal Group Overshoot/Undershoot Tolerance........................50
Signal Ringback Specifications for Non-AGTL
Signal Simulation at the Processor Pins ............................................................50
Pentium
III Processor with 512KB L2 Cache Thermal Design Power...............52
THERMTRIP# Time Requirement ......................................................................52
Thermal Diode Parameters.................................................................................53
Thermal Diode Interface......................................................................................53
Pentium
III Processor with 512KB L2 Cache Package Dimensions .................56
Processor Case Loading Parameters .................................................................56
Signal Listing in Order by Signal Name .............................................................60
Signal Listing in Order by Pin Number ...............................................................66
Boxed Processor Fan Heatsink Spatial Dimensions...........................................73
Fan Heatsink Power and Signal Specifications...................................................75
Signal Description ..............................................................................................77
Output Signals ...................................................................................................85
Input Signals .......................................................................................................85
Input/Output Signals (Single Driver) ...................................................................87
Input/Output Signals (Multiple Driver) .................................................................87
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