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RTL8139C(L)
2002/01/10
Rev.1.4
41
CISPtr:
CardBus CIS Pointer. This field is valid only when CardB_En (bit3, Config3) = 1. The value of this register is
auto-loaded from 93C46 or 93C56 (from offset 30h-31h).
-
Bit 2-0: Address Space Indicator
Bit2-0
0
Not supported. (CIS begins in device-dependent configuration space.)
1-6
The CIS begins in the memory address governed by one of the six Base
Address Registers. Ex., if the value is 2, then the CIS begins in the memory
address space governed by Base Address Register 2.
7
The CIS begins in the Expansion ROM space.
Bit27-3: Address Space Offset
Bit31-28: ROM Image number
Bit2-0
Space Type
Address Space Offset Values
0
Configuration space
Not supported.
X; 1
≤
X
≤
6
Memory space
0h
≤
value
≤
FFFF FFF8h. This is the offset into the memory address space
governed by Base Address Register X. Adding this value to the value in the
Base Address Register gives the location of the start of the CIS. For
RTL8139C(L), the value is 100h.
7
Expansion ROM
0
≤
image number
≤
Fh, 0h
≤
value
≤
0FFF FFF8h. This is the offset into the
expansion ROM address space governed by the Expansion ROM Base
Register. The image number is in the uppermost nibble of the CISPtr
register. The value consists of the remaining bytes. For RTL8139C(L), the
image number is 0h.
This read-only register points to where the CIS begins, in one of the following spaces:
i.
Memory space --- The CIS may be in any of the memory spaces from offset 100h and up after being
auto-loaded from 93C56. The CIS is stored in 93C56 EEPROM physically from offset 80h-FFh.
ii.
Expansion ROM space --- The CIS is stored in expansion ROM physically within the 128KB max.
Meaning
-
-
SVID:
Subsystem Vendor ID. This field will be set to a value corresponding to the PCI Subsystem Vendor ID in the external
EEPROM. If there is no EEPROM, this field will default to a value of 11ECh which is Realtek Semiconductor's PCI
Subsystem Vendor ID.
SMID:
Subsystem ID. This field will be set to a value corresponding to the PCI Subsystem ID in the external EEPROM. If there
is no EEPROM, this field will default to a value of 8129h.
BMAR:
This register specifies the base memory address for memory accesses to the RTL8139C(L) operational registers. This
register must be initialized prior to accessing any of the RTL8139C(L)'s registers with memory access.
Bit
31-18
17-11
Symbol
BMAR31-18 Boot ROM Base Address
ROMSIZE
These bits indicate how many Boot ROM spaces to be supported.
The Relationship between Config 0 <BS2:0> and BMAR17-11 is the following:
BS2 BS1 BS0 Description
0
0
0
No Boot ROM, BROMEN=0 (R)
0
0
1
8K Boot ROM, BROMEN (R/W), BMAR12-11 = 0 (R), BMAR17-13 (R/W)
0
1
0
16K Boot ROM, BROMEN (R/W), BMAR13-11 = 0 (R), BMAR17-14 (R/W)
0
1
1
32K Boot ROM, BROMEN (R/W), BMAR14-11 = 0 (R), BMAR17-15 (R/W)
1
0
0
64K Boot ROM, BROMEN (R/W), BMAR15-11 = 0 (R), BMAR17-16 (R/W)
1
0
1
128K Boot ROM, BROMEN(R/W), BMAR16-11=0 (R), BMAR17 (R/W)
1
1
0
unused
1
1
1
unused
-
Reserved (read back 0)
BROMEN
Boot ROM Enable: This is used by the PCI BIOS to enable accesses to Boot ROM.
Description
10-1
0