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參數(shù)資料
| 型號： | S29PL032J70BAW13 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 70 ns, PBGA56 |
| 封裝： | 7 X 9 MM, FBGA-56 |
| 文件頁數(shù)： | 24/100頁 |
| 文件大?。?/td> | 967K |
| 代理商： | S29PL032J70BAW13 |
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March 15, 2004 31107A5
S29PL127J/S29PL129J/S29PL064J/S29PL032J
3
PR EL IMINAR Y
General Description
The PL127J/PL129J/PL064J/PL032J is a 128/128/64/32 Mbit, 3.0 volt-only Page
Mode and Simultaneous Read/Write Flash memory device organized as 8/8/4/2
Mwords. The devices are offered in the following packages:
11mm x 8mm, 64-ball Fine-pitch BGA standalone (all)
9mm x 8mm, 80-ball Fine-pitch BGA standalone (PL127J and PL129J)
8mm
x
11.6mm,
64-ball
Fine
pitch
BGA
multi-chip
compatible
(PL127J/PL129J)
The word-wide data (x16) appears on DQ15-DQ0. This device can be pro-
grammed in-system or in standard EPROM programmers. A 12.0 V VPP is not
required for write or erase operations.
The device offers fast page access times of 20 to 30 ns, with corresponding ran-
dom access times of 55 to 70 ns, respectively, allowing high speed
microprocessors to operate without wait states. To eliminate bus contention the
device has separate chip enable (CE#), write enable (WE#) and output enable
(OE#) controls. Note: Device PL129J has 2 chip enable inputs (CE1#, CE2#).
Simultaneous Read/Write Operation with Zero Latency
The Simultaneous Read/Write architecture provides simultaneous operation
by dividing the memory space into 4 banks, which can be considered to be four
separate memory arrays as far as certain operations are concerned. The device
can improve overall system performance by allowing a host system to program
or erase in one bank, then immediately and simultaneously read from another
bank with zero latency (with two simultaneous operations operating at any one
time). This releases the system from waiting for the completion of a program or
erase operation, greatly improving system performance.
The device can be organized in both top and bottom sector configurations. The
banks are organized as follows:
Page Mode Features
The page size is 8 words. After initial page access is accomplished, the page mode
operation provides fast read access speed of random locations within that page.
Bank
PL127J Sectors
PL064J Sectors
PL032J Sectors
A
16 Mbit (4 Kw x 8 and 32 Kw x 31)
8 Mbit (4 Kw x 8 and 32 Kw x 15)
4 Mbit (4 Kw x 8 and 32 Kw x 7)
B
48 Mbit (32 Kw x 96)
24 Mbit (32 Kw x 48)
12 Mbit (32 Kw x 24)
C
48 Mbit (32 Kw x 96)
24 Mbit (32 Kw x 48)
12 Mbit (32 Kw x 24)
D
16 Mbit (4 Kw x 8 and 32 Kw x 31)
8 Mbit (4 Kw x 8 and 32 Kw x 15)
4 Mbit (4 Kw x 8 and 32 Kw x 7)
Bank
PL129J Sectors
CE# Control
1A
16 Mbit (4 Kw x 8 and 32 Kw x 31)
CE1#
1B
48 Mbit (32 Kw x 96)
CE1#
2A
48 Mbit (32 Kw x 96)
CE2#
2B
16 Mbit (4 Kw x 8 and 32 Kw x 31)
CE2#
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29PL032J70BFI120 | 功能描述:閃存 32Mb 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL032J70BFI120(E) | 制造商:Spansion 功能描述:Cut Tape |
| S29PL032J70BFI122 | 功能描述:閃存 32Mb 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL032J70BFI123 | 功能描述:閃存 32MB 閃存 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL064J | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
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