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參數(shù)資料
| 型號(hào)： | S39421S |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Hot Swap Voltage Controller |
| 中文描述： | 電壓熱插拔控制器 |
| 文件頁數(shù)： | 24/28頁 |
| 文件大小： | 201K |
| 代理商： | S39421S |
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24
S39421
2024 9.0 8/8/00
Pre-bias
The switching capacitance of the individual signal lines at
the interface must be charged to the instantaneous volt-
age on the corresponding bus line. These currents distort
the signal that is being transmitted at that instant. To
address this issue the proposed VME Live Insertion Spec
states:
“
All VME system drivers and receivers SHALL be
pre-biased to 1.7 =/-0.2 Vdc with a resistive network
powered by the pre-charge +5V. . . before the board signal
pins contact the backplane VME64 bus connector(s).
”
The ABTE logic addresses this issue head-on by provid-
ing a separate VCCBias pin that is internally connected to
a pre-charge resistor network.
CARD REMOVAL
A clean transition for card removal can be performed
either by the opening of the injector/ejector levers which
in turn opens the switches that force the PND inputs to
ground or by the host driving LI/I* low. Both actions will tell
the S39421 to disable the high side drivers and force the
reset outputs active.
RECAP
As the board is first inserted into the backplane voltage
potentials on are shunted to ground thru the use of various
bleed resistors and physical contact with the chassis
frame. These are make then break processes so that by
the time the card is ready to make contact with the
backplane connector the board is electrically isolated
from the frame.
The first pins of the connector to make contact with the
backplane are ground and Vpc (pre-charge VCC). Vpc
should be tied directly to the S39421 and the transceiver
BiasVcc input. Once the S39421 detects the presence of
Vpc it will begin driving the reset outputs active, shut off all
the control signals to the power FETs and begin driving
the LI/O* low. The injector/ejector levers will close the
switches grounding the PND inputs allowing the S39421
to check the state of the VSEL pin and determine what bus
voltages should be monitored. If the bus voltages are at
or greater than Vtrip
AND
LI/I* has been released the
S39421 will turn on the high side driver outputs VGATE3
and VGATE5 and the DRVREN output.
The voltages to the backend logic are applied with a
nominal slew rate of VGATE3 and VGATE5 set at 250V/
sec. The backend voltages should also be fed back to the
S39421 and as soon as they are at or above their Vtrip
level, the CARD_V_VLD will be released. If the host has
released its RESET input and LI/I* input, the S39421 will
release the timer for its reset circuit. After tPURST the
reset outputs to the backend logic will be released and the
SGNL_VLD output will be driven active [backplane signal
LI/O]. This is the final step in activating a board for live
insertion.
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