參數(shù)資料
型號： S71GL064A08
廠商： Spansion Inc.
英文描述： STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
中文描述： 堆疊式多芯片產(chǎn)品，閃存和RAM
文件頁數(shù)： 100/134頁
文件大?。?/td> 2383K
代理商： S71GL064A08
66
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
Erase and Program Operations-S29GL064A Only
Notes:
1. Not 100% tested.
2. See the “Erase and Programming Performance” section for more information.
3. For 1–16 words/1–32 bytes programmed.
4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming has resumed
(that is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available
immediately after programming has resumed. See Figure 16.
Parameter
Speed Options
Unit
JEDEC
Std.
Description
100
tAVAV
tWC
Write Cycle Time (Note 1)
Min
100
ns
tAVWL
tAS
Address Setup Time
Min
0
ns
tASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
tWLAX
tAH
Address Hold Time
Min
45
ns
tAHT
Address Hold Time From CE# or OE# high during toggle bit
polling
Min
0
ns
tDVWH
tDS
Data Setup Time
Min
35
ns
tWHDX
tDH
Data Hold Time
Min
0
ns
tCEPH
CE# High during toggle bit polling
Min
20
ns
tOEPH
OE# High during toggle bit polling
Min
20
ns
tGHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
tELWL
tCS
CE# Setup Time
Min
0
ns
tWHEH
tCH
CE# Hold Time
Min
0
ns
tWLWH
tWP
Write Pulse Width
Min
35
ns
tWHDL
tWPH
Write Pulse Width High
Min
30
ns
tWHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
s
Single Word Program Operation (Note 2)
Typ
60
Accelerated Single Word Program Operation (Note 2)
Typ
54
tWHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
tVHH
VHH Rise and Fall Time (Note 1)
Min
250
ns
tVCS
VCC Setup Time (Note 1)
Min
50
s
tBUSY
WE# High to RY/BY# Low
Min
90
ns
tPOLL
Program Valid before Status Polling
Max
4
s
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參數(shù)描述
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