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參數(shù)資料
| 型號(hào)： | S71GL064A08 |
| 廠商： | Spansion Inc. |
| 英文描述： | STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM |
| 中文描述： | 堆疊式多芯片產(chǎn)品，閃存和RAM |
| 文件頁(yè)數(shù)： | 92/134頁(yè) |
| 文件大?。?/td> | 2383K |
| 代理商： | S71GL064A08 |
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58
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the system may read DQ3 to determine
whether or not erasure has begun. (The sector erase timer does not apply to the chip erase
command.) If additional sectors are selected for erasure, the entire time-out also applies after
each additional sector erase command. When the time-out period is complete, DQ3 switches
from a “0” to a “1.” If the time between additional sector erase commands from the system
can be assumed to be less than 50 s, the system need not monitor DQ3. See also the Sector
Erase Command Sequence section.
After the sector erase command is written, the system should read the status of DQ7 (Data#
Polling) or DQ6 (Toggle Bit I) to ensure that the device has accepted the command sequence,
and then read DQ3. If DQ3 is “1,” the Embedded Erase algorithm has begun; all further com-
mands (except Erase Suspend) are ignored until the erase operation is complete. If DQ3 is
“0,” the device will accept additional sector erase commands. To ensure the command has
been accepted, the system software should check the status of DQ3 prior to and following
each subsequent sector erase command. If DQ3 is high on the second status check, the last
command might not have been accepted.
Table 11 shows the status of DQ3 relative to the other status bits.
DQ1: Write-to-Buffer Abort
DQ1 indicates whether a Write-to-Buffer operation was aborted. Under these conditions DQ1
produces a “1”. The system must issue the Write-to-Buffer-Abort-Reset command sequence
to return the device to reading array data. See Write Buffer section for more details.
Table 11. Write Operation Status
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program, Embedded Erase, or Write-to-Buffer operation has exceeded the maximum timing limits.
Refer to the section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.
3. The Data# Polling algorithm should be used to monitor the last loaded write-buffer address location.
4. DQ1 switches to ‘1’ when the device has aborted the write-to-buffer operation.
Status
DQ7
(Note 2)
DQ6
DQ5
(Note 1)
DQ3
DQ2
(Note 2)
DQ1
RY/BY#
Standard
Mode
Embedded Program Algorithm
DQ7#
Toggle
0
N/A
No toggle
0
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
N/A
0
Program
Suspend
Mode
Program-
Suspend
Read
Program-Suspended
Sector
Invalid (not allowed)
1
Non-Program
Suspended Sector
Data
1
Erase
Suspend
Mode
Erase-
Suspend
Read
Erase-Suspended
Sector
1
No toggle
0
N/A
Toggle
N/A
1
Non-Erase
Suspended Sector
Data
1
Erase-Suspend-Program
(Embedded Program)
DQ7#
Toggle
0
N/A
0
Write-to-
Buffer
Busy (Note 3)
DQ7#
Toggle
0
N/A
0
Abort (Note 4)
DQ7#
Toggle
0
N/A
1
0
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| S71GL064A08-0B | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM |
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| S71GL064A08BAI0B2 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GL064A08BAI0B3 | 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
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