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參數(shù)資料
| 型號： | SA9025 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | 900 MHz transmit modulator and 2.2 GHz fractional-N synthesizer |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 X 1.40 MM, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 10/23頁 |
| 文件大小： | 134K |
| 代理商： | SA9025 |
Philips Semiconductors
Objective specification
SA9025
900 MHz transmit modulator and 2.2 GHz
fractional–N synthesizer
1997 Aug 01
10
Functional Description Main Channel Synthesizer
& Auxiliary Synthesizer
SERIAL INPUT + PROGRAM LATCHES
MAIN DIVIDERS
NORMAL
OUTPUT
CHARGE
PUMP
INTEGRAL
OUTPUT
CHARGE
PUMP
AUXILIARY
OUTPUT
CHARGE
PUMP
MAIN
PHASE
DETECTOR
MAIN
REFERENCE
SELECT
SPEED-UP
OUTPUT
CHARGE
PUMP
REFERENCE DIVIDER
÷
2
÷
2
÷
2
AUXILIARY
REFERENCE
SELECT
AUXILIARY
PHASE
DETECTOR
AUXILIARY DIVIDER
DATA
CLOCK
STROBE
INM1
INM2
INR
INA
FB
RN
PHP
PHI
RN
PHA
LOCK
PD1
NMAIN
FMOD
NF
16
3
FDAC
8
2
PD1
NR
PD1 + PD2
12
SA
PD2
NAUX
2
SM
PD2
2
2
14
FRACTIONAL
ACCUMULATOR
FB
1
SR01112
FDAC
8
FDAC
8
Figure 4.
Synthesizer Block Diagram
Serial Programming Input
The serial input is a 3-wire input (CLOCK, DATA, STROBE) used to
program all counter ratios, DACs, selection and enable bits. The
programming data is structured into 24-bit words; each word
includes 2 or 3 address bits. Figure [5] shows the timing diagram of
the serial input. When STROBE = L, the clock driver is enabled and
on positive edges of the CLOCK, the signal on DATA input is
clocked into a shift register. When STROBE = H, the clock is
disabled and the data in the shift register remains stable.
Depending on the 2 or 3 address bits, data is latched into different
working or temporary registers. In order to fully program the
synthesizer, 3 words must be sent: A, B and C. The D word
programs all other functions within the SA9025. Those functions are
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