參數(shù)資料
型號: SAK-TC1762-128F80HL
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, MICROCONTROLLER, PQFP176
封裝: PLASTIC, LQFP-176
文件頁數(shù): 48/114頁
文件大小: 852K
代理商: SAK-TC1762-128F80HL
TC1762
Functional Description
Preliminary
Data Sheet
35
V1.0, 2008-04
3.8
High-Speed Synchronous Serial Interface (SSC0)
Figure 3-4 shows a global view of the functional blocks and interfaces of the high-speed
Synchronous Serial Interface, SSC0.
Figure 3-4
Block Diagram of the SSC Interfaces
The SSC supports full-duplex and half-duplex serial synchronous communication up to
40.0 MBaud at 80 MHz module clock and up to 33 MBaud at 66 MHz module clock. The
serial clock signal can be generated by the SSC itself (Master Mode) or can be received
from an external master (Slave Mode). Data width, shift direction, clock polarity and
phase are programmable. This allows communication with SPI-compatible devices.
Transmission and reception of data is double-buffered. A shift clock generator provides
the SSC with a separate serial clock signal. Seven slave select inputs are available for
Clock
Control
Address
Decoder
Interrupt
Control
f
SSC 0
SSC0_TDR
EIR
TIR
RIR
Port 3
Control
SSC0
Module
(Kernel)
MRSTB
MTSR
Master
SLSI1
SLSO[2:0]
MRSTA
MTSRB
MRST
MTSRA
SCLKB
SCLK
SCLKA
Slave
Master
Slave
Master
f
CL C0
SLSI[7:2]
1)
Enable
1)
M/S Select
1)
1) These lines are not connected
Port 2
Control
SLSO[5:3]
SLSO6
SLSO7
1)
SSC0_RDR
To
DMA
MCB06225
P3.3 /MRST0
P3.4 /MTSR0
P3.2 /SCLK0
P3.7 /SLSI0
P2.8 /SLSO04
P2.9 /SLSO05
P2.1 /SLSO03
A2
P3.7 /SLSO02
P3.5 /SLSO00
P3.8 /SLSO06
A2
P3.6 /SLSO01
A2
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