參數(shù)資料
型號: SI3210PPQX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 143/148頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SI3210 MLP
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3210
已供物品: 板,子卡,CD
其它名稱: 336-1169
Si3210/Si3211
94
Rev. 1.61
Not
Recommended
fo
r N
ew
D
esi
gn
s
Reset settings = 0000_0000
Reset settings = 0011_0010 (revision C); 0101_0100 (subsequent revisions)
Register 52. FSK Data
Bit
D7
D6D5D4
D3D2
D1D0
Name
FSKDAT
Type
R/W
Bit
Name
Function
7:1
Reserved
Read returns zero.
0
FSKDAT
FSK Data.
When FSKEN = 1 (direct Register 108, bit 6) and REL = 1 (direct Register 32, bit 6), this
bit serves as the buffered input for FSK generation bit stream data.
Register 63. Loop Closure Debounce Interval
Bit
D7
D6D5D4
D3D2
D1D0
Name
LCD[7:0]
Type
Bit
Name
Function
7:0
LCD[7:0]
Loop Closure Debounce Interval for Automatic Ringing.
This register sets the loop closure debounce interval for the ringing silent period when
using automatic ringing cadences. The value may be set between 0 ms (0x00) and
159 ms (0x7F) in 1.25 ms steps.
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