參數(shù)資料
型號: SI3210PPQX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 56/148頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SI3210 MLP
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3210
已供物品: 板,子卡,CD
其它名稱: 336-1169
Si3210/Si3211
Rev. 1.61
15
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 8. PCM Highway Interface Timing Diagram
Setup Time, DRX to PCLK Fall
tsu2
25
ns
Hold Time, DRX to PCLK Fall
th2
20
ns
Notes:
1. All timing is referenced to the 50% level of the waveform. Input test levels are VIH – VI/O –0.4V, VIL =0.4 V.
2. Not a valid PCLK frequency for GCI mode.
3. Specification applies to PCLK fall to DTX tri-state when that mode is selected (TRI = 0).
Table 11. Switching Characteristics—PCM Highway Serial Interface
VD = 3.13 to 5.25 V, TA = 0 to 70 °C for F-Grade, –40 to 85 °C for G-Grade, CL =20pF
PCLK
DRX
FSYNC
DTX
t
d1
t
d2
t
su2
t
h2
t
d3
t
r
t
c
t
su 1
t
h1
t
f
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