- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄18712 > SI4123M-EVB (Silicon Laboratories Inc)BOARD EVALUATION FOR SI4123 PDF資料下載
參數(shù)資料
| 型號(hào)： | SI4123M-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 9/36頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR SI4123 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 合成器 |
| 適用于相關(guān)產(chǎn)品： | SI4123 |
| 已供物品： | 板，CD |
| 其它名稱： | 336-1108 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
Si4133
Rev. 1.61
17
Figure 15. External Inductance Connection
As a design example, consider that the goal is to
synthesize frequencies in a 25 MHz band between
1120 and 1145 MHz using the Si4133-GT. The center
frequency should be defined as midway between the
two extremes, or 1132.5 MHz. The PLL can adjust the
VCO output frequency ±5% of the center frequency, or
±56.6 MHz of 1132.5 MHz (i.e., from approximately
1076 to 1189 MHz). The RF2 VCO has a CNOM of
4.8 pF. A 4.1 nH inductance in parallel with this
capacitance yields the required center frequency. An
external inductance of 1.8 nH should be connected
between RFLC and RFLD as shown in Figure 15. This,
in addition to 2.3 nH of package inductance, presents
the
correct
total
inductance
to
the
VCO.
In
manufacturing, the external inductance can vary ±10%
of its nominal value and the Si4133 corrects for the
variation with the self-tuning algorithm.
For more information on designing the external trace
inductors, refer to Application Note 31: Inductor Design
for the Si41xx Synthesizer Family.
3.3. Extended Frequency Operation
The Si4133 may operate at an extended frequency
range of 1850 MHz to 2050 MHz by connecting the
RFLA and RFLB pins directly. For information on
configuring
the
Si4133
for
extended
frequency
operation, refer to Application Note 41: Extended
Frequency Operation of Silicon Laboratories Frequency
Synthesizers.
3.4. Self-Tuning Algorithm
The self-tuning algorithm is initiated immediately after
powerup of a PLL or, if the PLL is already powered, after
a change in its programmed output frequency. This
algorithm attempts to tune the VCO so that its free-
running frequency is near the required output frequency.
In
doing
so,
the
algorithm
compensates
for
manufacturing tolerance errors in the value of the
external inductance connected to the VCO. It also
reduces the frequency error for which the PLL must
correct to get the precise required output frequency. The
self-tuning algorithm leaves the VCO oscillating at a
frequency in error by somewhat less than 1% of the
desired output frequency.
After self-tuning, the PLL controls the VCO oscillation
frequency. The PLL completes frequency locking,
eliminating any remaining frequency error. From then
on, it maintains frequency-lock, compensating for
effects of temperature and supply voltage variations.
The Si4133’s self-tuning algorithm compensates for
component value errors at any temperature within the
specified temperature range. However, the ability of the
PLL to compensate for drift in component values that
occur
after
self-tuning
is
limited.
For
external
inductances
with
temperature
coefficients
approximately ±150 ppm/oC, the PLL can maintain lock
for changes in temperature of approximately ±30 oC.
Applications where the PLL is regularly powered down
or the frequency is periodically reprogrammed minimize
or eliminate the potential effects of temperature drift
because the VCO is re-tuned in either case. In
applications where the ambient temperature can drift
substantially after self-tuning, it might be necessary to
monitor the lock-detect bar (LDETB) signal on the
AUXOUT pin to determine whether a PLL is about to
run out of locking capability. See “3.10. Auxiliary Output
Table 6. Si4133-GT VCO Characteristics
VCO fCEN Range
(MHz)
CNOM
(pF)
LPKG
(nH)
LEXT Range
(nH)
Min
Max
Min
Max
RF1
947
1720
4.3
2.0
0.0
4.6
RF2
789
1429
4.8
2.3
0.3
6.2
IF
526
952
6.5
2.1
2.2
12.0
Table 7. Si4133-GM VCO Characteristics
VCO fCEN Range
(MHz)
CNOM
(pF)
LPKG
(nH)
LEXT Range
(nH)
Min
Max
Min
Max
RF1
947
1720
4.3
1.5
0.5
5.1
RF2
789
1429
4.8
1.5
1.1
7.0
IF
526
952
6.5
1.6
2.7
12.5
L
PKG
2
L
PKG
2
L
EXT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GLAA01B | SWITCH TOP PLUNGER SNAP SPDT |
| SI4122M-EVB | BOARD EVALUATION FOR SI4122 |
| SI4113M-EVB | BOARD EVALUATION FOR SI4113 |
| GLAA01A | SWITCH SIDE-ROTRY SNAP SPDT |
| EK64904-11 | KIT EVAL FOR 64904 W/CABLES |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI4124DY | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:N-Channel 40-V (D-S) MOSFET |
| Si4124DY-T1-E3 | 功能描述:MOSFET 40V 20.5A 5.7W 7.5mohm @ 10V RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| SI4124DY-T1-GE3 | 功能描述:MOSFET 40V 20.5A 5.7W 7.5mohm @ 10V RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| SI4126 | 制造商:SILABS 制造商全稱:SILABS 功能描述:ISM RF SYNTHESIZER WITH INTEGRATED VCOS FOR WIRELESS COMMUNICATIONS |
| SI4126-BM | 功能描述:射頻無線雜項(xiàng) USE 634-SI4126-F-BM FOR NEW DESIGNS RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。