Si5322
10
Rev. 0.51
Table 5. Performance Specifications1, 2, 3, 4 (VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Jitter Generation
fIN =fOUT =622.08MHz,
LVPECL Output Format
BW = 877 Hz
JGEN
50 kHz–80 MHz
—
.47
—
ps rms
12 kHz–20 MHz
—
.48
—
ps rms
4MHz–80MHz
—
.23
—
ps rms
Phase Noise
fIN =fOUT = 622.08 MHz
LVPECL Output Format
CKOPN
1 kHz offset
—
–90
—
dBc/Hz
10 kHz offset
—
–113
—
dBc/Hz
100 kHz offset
—
–118
—
dBc/Hz
1 MHz offset
—
–132
—
dBc/Hz
Notes:
1. BWSEL [1:0] loop bandwidth settings provided in by DSPLLsim.
2. VDD =3.3 V
3. TA =85°C
4. Test condition: fIN =622.08MHz, fOUT = 622.08 MHz, LVPECL clock input: 1.19 Vppd with 0.5 ns rise/fall time
(20-80%), LVPECL clock output.
Table 6. Thermal Characteristics
(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Thermal Resistance
Junction to Ambient
JA
Still Air
—
32
—
C/W
Thermal Resistance
Junction to Case
JC
Still Air
—
14
—
C/W
Table 7. Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
DC Supply Voltage
VDD
–0.5 to 3.8
V
LVCMOS Input Voltage
VDIG
–0.3 to (VDD + 0.3)
V
CKINn Voltage Level Limits
CKNVIN
0 to VDD
V
Operating Junction Temperature
TJCT
–55 to 150
C
Storage Temperature Range
TSTG
–55 to 150
C
ESD HBM Tolerance (100 pF, 1.5 k
); All pins except
CKIN+/CKIN–
2kV
ESD MM Tolerance; All pins except CKIN+/CKIN–
150
V
ESD HBM Tolerance (100 pF, 1.5 k
); CKIN+/CKIN–
750
V
ESD MM Tolerance; CKIN+/CKIN–
100
V
Latch-Up Tolerance
JESD78 Compliant
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.