參數(shù)資料
型號(hào): SI5367/68-EVB
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 66/80頁(yè)
文件大小: 0K
描述: BOARD EVAL FOR SI5367/68
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),時(shí)鐘發(fā)生器
已用 IC / 零件: SI5367,SI5368
已供物品: 板,線(xiàn)纜,CD,文檔
Si5367
Rev. 0.5
69
11
C3B
O
LVCMOS
CKIN3 Invalid Indicator.
This pin performs the CK3_BAD function if
CK3_BAD_PIN = 1 and is tristated if CK3_BAD_PIN =0.
Active polarity is controlled by CK_BAD_POL.
0 = No alarm on CKIN3.
1 = Alarm on CKIN3.
12
INT_ALM
O
LVCMOS
Interrupt/Alarm Output Indicator.
This pin functions as a maskable interrupt output with
active polarity controlled by the INT_POL register bit.
The INT output function can be turned off by setting
INT_PIN = 0. If the ALRMOUT function is desired
instead on this pin, set ALRMOUT_PIN = 1 and
INT_PIN =0.
0 = ALRMOUT not active.
1 = ALRMOUT active.
The active polarity is controlled by CK_BAD_POL. If no
function is selected, the pin tristates.
13
57
CS0_C3A
CS1_C4A
I/O
LVCMOS
Input Clock Select/CKIN3 or CKIN4 Active Clock
Indicator.
Input: If manual clock selection is chosen, and if
CKSEL_PIN = 1, the CKSEL pins control clock
selection and the CKSEL_REG bits are ignored.
If configured as inputs, these pins must not
float.
Output: If CKSEL_PIN =0, the CKSEL_REG register
bits control this function.
If auto clock selection is enabled, then they
serve as the CKIN_n active clock indicator.
0 = CKIN3 (CKIN4) is not the active input clock
1 = CKIN3 (CKIN4) is currently the active input
to the PLL
The CKn_ACTV_REG bit always reflects the
active clock status for CKIN_n. If
CKn_ACTV_PIN = 1, this status will also be
reflected on the CnA pin with active polarity con-
trolled by the CK_ACTV_POL bit. If
CKn_ACTV_PIN = 0, this output tristates.
Table 11. Si5367 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
Note: Internal register names are indicated by underlined italics, e.g. INT_PIN. See Si5368 Register Map.
CS[1:0]
Active Input Clock
00
CKIN1
01
CKIN2
10
CKIN3
11
CKIN4
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