參數資料
型號: SI5369-EVB
廠商: Silicon Laboratories Inc
文件頁數: 32/84頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR SI5369 CLK MULT
標準包裝: 1
主要目的: 計時,精密時鐘
嵌入式:
已用 IC / 零件: Si5369
已供物品: 板,線纜,CD,文檔
Si5369
38
Rev. 1.0
Reset value = 1111 1111
Register 21.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
CK4_ACTV_PIN CK3_ACTV_PIN CK2_ACTV_PIN CK1_ACTV_PIN
CKSEL_ PIN
Type
R
R/W
Bit
Name
Function
7:5
Reserved
4
CK4_ACTV_PIN
CK4_ACTV_PIN.
If the CKSEL[1]/CK4_ACTV pin is functioning as the CK4_ACTV output (see
CKSEL[1]/CK4_ACTV pin description on CK4_ACTV), the CK4_ACTV_REG sta-
tus bit can be reflected to the CK4_ACTV output pin using the CK4_ACTV_PIN
enable function.
0: CK4_ACTV output pin tristated
1: CK4_ACTV status reflected to output pin.
3
CK3_ACTV_PIN
CK3_ACTV_PIN.
If the CKSEL[0]/CK3_ACTV pin is functioning as the CK3_ACTV output (see
CKSEL[0]/CK3_ACTV pin description on CK3_ACTV), the CK3_ACTV_REG sta-
tus bit can be reflected to the CK3_ACTV output pin using the CK3_ACTV_PIN
enable function.
0: CK3_ACTV output pin tristated.
1: CK3_ACTV status reflected to output pin.
2
CK2_ACTV_PIN
CK2_ACTV_PIN.
The CK2_ACTV_REG status bit can be reflected to the CK2_ACTV output pin
using the
CK2_ACTV_PIN enable function.
0: CK2_ACTV output pin tristated.
1: CK2_ACTV status reflected to output pin.
1
CK1_ACTV_PIN
CK1_ACTV_PIN.
The CK1_ACTV_REG status bit can be reflected to the CK1_ACTV output pin
using the CK1_ACTV_PIN enable function.
0: CK1_ACTV output pin tristated.
1: CK1_ACTV status reflected to output pin.
0
CKSEL_PIN
CKSEL_PIN.
If manual clock selection is being used, clock selection can be controlled via the
CKSEL_REG[1:0] register bits or the CKSEL[1:0] input pins. The CKx_ACTV_PIN
bits in this register are of consequence only when CKSEL_PIN is 1.
0: CKSEL pins ignored. CKSEL_REG[1:0] register bits control clock selection.
1: CKSEL[1:0] input pins controls clock selection.
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