參數(shù)資料
型號(hào)： SI5369-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 75/84頁
文件大小： 0K
描述： BOARD EVAL FOR SI5369 CLK MULT
標(biāo)準(zhǔn)包裝： 1
主要目的： 計(jì)時(shí)，精密時(shí)鐘
嵌入式： 否
已用 IC / 零件： Si5369
已供物品： 板，線纜，CD，文檔
Si5369
Rev. 1.0
77
77
78
CKOUT3+
CKOUT3–
OMULTI
Clock Output 3.
Differential clock output. Output signal format is selected by
SFOUT3_REG register bits. Output is differential for LVPECL,
LVDS, and CML compatible modes. For CMOS format, both
output pins drive identical single-ended clock outputs.
82
83
CKOUT1–
CKOUT1+
OMULTI
Clock Output 1.
Differential clock output. Output signal format is selected by
SFOUT1_REG register bits. Output is differential for LVPECL,
LVDS, and CML compatible modes. For CMOS format, both
output pins drive identical single-ended clock outputs.
87
88
FS_OUT–
FS_OUT+
OMULTI
Frame Sync Output.
Differential frame sync output or fifth high-speed clock output.
Output signal format is selected by SFOUT_FSYNC_REG reg-
ister bits. Output is differential for LVPECL, LVDS, and CML
compatible modes. For CMOS format, both output pins drive
identical single-ended clock outputs. Duty cycle and active
polarity are controlled by FSYNC_PW and FSYNC_POL bits,
respectively. Detailed operations and timing characteristics for
these pins may be found in the Any-Frequency Precision Clock
Family Reference Manual.
90
CMODE
I
LVCMOS
Control Mode.
Selects I2C or SPI control mode for the device.
0=I2C Control Mode.
1 = SPI Control Mode.
This pin must be tied high or low.
92
93
CKOUT2+
CKOUT2–
OMULTI
Clock Output 2.
Differential clock output. Output signal format is selected by
SFOUT2_REG register bits. Output is differential for LVPECL,
LVDS, and CML compatible modes. For CMOS format, both
output pins drive identical single-ended clock outputs.
97
98
CKOUT4–
CKOUT4+
OMULTI
Clock Output 4.
Differential clock output. Output signal format is selected by
SFOUT4_REG register bits. Output is differential for LVPECL,
LVDS, and CML compatible modes. For CMOS format, both
output pins drive identical single-ended clock outputs.
GND PAD
GND
Supply
Ground Pad.
The ground pad must provide a low thermal and electrical
impedance to a ground plane.
Table 10. Si5369 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
Note: Internal register names are indicated by underlined italics, e.g., INT_PIN. See Si5369 Register Map.
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