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參數(shù)資料
| 型號： | SLX24C64 |
| 廠商： | SIEMENS AG |
| 英文描述： | 64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| 中文描述： | 64千位8192 × 8位串行CMOS EEPROM的，I2C同步2線總線 |
| 文件頁數(shù)： | 17/27頁 |
| 文件大?。?/td> | 361K |
| 代理商： | SLX24C64 |
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SLx 24C01/02/P
Semiconductor Group
17
1998-07-27
6.3
A sequential read is initiated in the same way as a current read or a random read except
that the master acknowledges the data byte transmitted by the EEPROM. The EEPROM
then continues the data transmission. The internal address counter is incremented by
one during each data byte transmission.
A sequential read allows the entire memory to be read during one read operation. In the
SLx 24C02/P, after the highest addressable memory location is reached, the internal
address pointer “rolls over” to the address 0 and the sequential read continues. In the
SLx 24C01/P, there is no “roll over”.
The transmission is terminated by the master by releasing the SDA line (no
acknowledge) and generating a STOP condition (see
figure 13
).
Sequential Read
Figure 13
Sequential Read
Data Byte n
EEPROM
Bus Activity
SDA Line
Master
Bus Activity
S
R
T
A
T
S
CSW
Command Byte
1
K
C
A
Data Byte n+x
Data Byte n+1
A
C
K
C
K
A
P
IED02134
S
T
O
P
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