參數(shù)資料
型號(hào)： SLX24C64
廠商： SIEMENS AG
英文描述： 64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus
中文描述： 64千位8192 × 8位串行CMOS EEPROM的，I2C同步2線總線
文件頁數(shù)： 7/27頁
文件大?。?/td> 361K
代理商： SLX24C64
SLx 24C01/02/P
Semiconductor Group
7
1998-07-27
3
The SLx 24C01/02/P devices support a master/slave bidirectional bus oriented protocol
in which the EEPROM always takes the role of a slave.
I
2
C-Bus Characteristics
Figure 3
Bus Configuration
Master
Device that initiates the transfer of data and provides the clock for both
transmit and receive operations.
Device addressed by the master, capable of receiving and transmitting
data.
Transmitter
The device with the SDA as output is defined as the transmitter. Due to
the open drain characteristic of the SDA output the device applying a low
level wins.
Receiver
The device with the SDA as input is defined as the receiver.
Slave
Slave 1
Slave 2
Slave 3
Slave 4
Slave 8
Slave 5
Slave 6
Slave 7
Master
V
CC
CC
V
IES02183
SCL
SDA
相關(guān)PDF資料
PDF描述
SLE24C01-D The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
SLE24C01-S The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
SLE24C02-D The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
SLE24C02-S The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
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