參數(shù)資料
型號(hào): SMARTPSE24-KIT
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 15/36頁(yè)
文件大?。?/td> 0K
描述: KIT EVAL REF 24PORT SPI/UART
標(biāo)準(zhǔn)包裝: 1
主要目的: 電源管理,以太網(wǎng)供電(POE),PSE
已用 IC / 零件: Si3452,Si3482,Si3500
已供物品: 板,線纜,CD
相關(guān)產(chǎn)品: SI3482-A01-GM-ND - IC CTLR POE 24-48PORT PSE 24-QFN
336-1830-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
336-1835-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
336-1829-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
336-1831-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
336-1834-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
336-1844-5-ND - IC POE SWITCH PWR OVER LAN 20QFN
336-1833-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
336-1832-5-ND - IC POE CONTROLLER MIDSPAN 40QFN
Si3452
22
Rev. 1.3
Revis
ion
0x60
Hardw
are
Revi
sion
RO
0x61
Firmwar
eRevi-
si
on
RO
0x62
Firmwar
eRevi-
si
on
RO
0x63
Firmwar
eRevi-
si
on
RO
T
able
1
9
.Si3452
Re
gister
Map
(Continue
d)
Ad
dress
Reg
ister
Nam
e
T
y
pe
B
7
B6
B5
B
4
B3
B
2
B
1
B0
R
e
gist
er
Con
tent
at
Power
Up
No
tes:
1.
Register
content
at
P
o
wer
U
pis
shown
for
the
Si3
452
Shut
dow
nM
ode
p
ar
t.Refer
to
"12.
Or
dering
Guide
"on
p
ag
e33
to
or
der
Auto
Mo
de
p
art
sw
ith
dif
ferent
d
efault
settings.
This
re
gister
can
be
chang
ed
via
the
h
ost.
R
efer
to
T
able
17
on
p
age
18
for
register
variations.
2.
B0
Alternative
B
timing
is
set
to
0x01
if
using
A
lter
native
B
det
ect
timing
.Refer
to
"5.6.
D
evice
S
tat
us
Re
gister
(0x1D)"
on
p
age
1
9and
"12
.Or
dering
Guid
e"
on
p
a
ge
33.
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