參數(shù)資料
型號: SMJ34020AHT
廠商: Texas Instruments, Inc.
英文描述: GRAPHICS SYSTEM PROCESSOR
中文描述: 圖形系統(tǒng)處理器
文件頁數(shù): 30/92頁
文件大?。?/td> 1458K
代理商: SMJ34020AHT
SMJ34020A
GRAPHICS SYSTEMPROCESSOR
SGUS011B – APRIL 1991 – REVISED AUGUST 1995
30
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
cycle timing examples (continued)
When SIZE16 is selected low (Figure 7), the SMJ34020A performs a second cycle to read (or write) the
remaining 16 bits of the word. Reads always access all 32 bits (all CAS strobes are active). Internally, the
SMJ34020A latches both the high and the low words obtained on the first read cycle. The sense of SIZE16 on
the second (odd-word) access is used to determine which half of the bus is to be sampled to replace the data
word latched during the first cycle.
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