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參數(shù)資料
| 型號(hào)： | SN54ABT8244 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Scan Test Devices With Octal Buffers(掃描測(cè)試裝置(帶八緩沖器)) |
| 中文描述： | 掃描測(cè)試設(shè)備與八路緩沖器（掃描測(cè)試裝置（帶八緩沖器）） |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 390K |
| 代理商： | SN54ABT8244 |
SN54ABT8244, SN74ABT8244
SCAN TEST DEVICES WITH OCTAL BUFFERS
SCBS485 – JULY 1994
3–12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
pseudo-random pattern generation (PRPG)
A pseudo-random pattern is generated in the shift-register elements of the output BSCs on each rising edge
of TCK, updated in the shadow latches, and applied to the device output pins on each falling edge of TCK. This
data also is updated in the shadow latches of the input BSCs and applied to the inputs of the normal on-chip
logic. Figure 4 illustrates the 16-bit linear-feedback shift-register algorithm through which the patterns are
generated. An initial seed value should be scanned into the BSR before performing this operation. Note that
a seed value of all zeroes does not produce additional patterns.
=
2A4
2Y4
2A3
2A2
2A1
1A4
1A3
1A2
1A1
2Y3
2Y2
2Y1
1Y4
1Y3
1Y2
1Y1
Figure 4. 16-Bit PRPG Configuration
parallel-signature analysis (PSA)
Data appearing at the device input pins is compressed into a 16-bit parallel signature in the shift-register
elements of the input BSCs on each rising edge of TCK. This data is then updated in the shadow latches of the
input BSCs and applied to the inputs of the normal on-chip logic. Data in the shadow latches of the output BSCs
remains constant and is applied to the device outputs. Figure 5 illustrates the 16-bit linear-feedback
shift-register algorithm through which the signature is generated. An initial seed value should be scanned into
the BSR before performing this operation.
=
=
M
2A4
2Y4
2A3
2A2
2A1
1A4
1A3
1A2
1A1
2Y3
2Y2
2Y1
1Y4
1Y3
1Y2
1Y1
Figure 5. 16-Bit PSA Configuration
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74ABT8244 | Scan Test Devices With Octal Buffers(掃描測(cè)試裝置(帶八緩沖器)) |
| SN54ABT828 | 10-Bit Buffers/Drivers With 3-State Outputs(10位緩沖器/驅(qū)動(dòng)器(三態(tài)輸出)) |
| SN74ABT828 | 10-Bit Buffers/Drivers With 3-State Outputs(10位緩沖器/驅(qū)動(dòng)器(三態(tài)輸出)) |
| SN54ABT834 | 8-Bit To 9-Bit Parity Bus Transceivers(8-9奇偶總線收發(fā)器) |
| SN74ABT834 | 8-Bit To 9-Bit Parity Bus Transceivers(8-9奇偶總線收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABT8245 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
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