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參數(shù)資料
| 型號： | SN54ABT8244 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Scan Test Devices With Octal Buffers(掃描測試裝置(帶八緩沖器)) |
| 中文描述： | 掃描測試設(shè)備與八路緩沖器（掃描測試裝置（帶八緩沖器）） |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 390K |
| 代理商： | SN54ABT8244 |
SN54ABT8244, SN74ABT8244
SCAN TEST DEVICES WITH OCTAL BUFFERS
SCBS485 – JULY 1994
3–6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Exit1-DR, Exit2-DR
The
Exit1-DR and Exit2-DR states are temporary states that end a data-register scan. It is possible to return
to the Shift-DR state from either Exit1-DR or Exit2-DR without recapturing the data register.
On the first falling edge of TCK after entry to Exit1-DR, TDO goes from the active state to the high-impedance
state.
Pause-DR
No specific function is performed in the stable Pause-DR state, in which the TAP controller can remain
indefinitely. The Pause-DR state suspends and resumes data-register scan operations without loss of data.
Update-DR
If the current instruction calls for the selected data register to be updated with current data, then such update
occurs on the falling edge of TCK following entry to the Update-DR state.
Capture-IR
When an instruction-register scan is selected, the TAP controller must pass through the Capture-IR state. In the
Capture-IR state, the instruction register captures its current status value. This capture operation occurs on the
rising edge of TCK upon which the TAP controller exits the Capture-IR state.
For the
′
ABT8244, the status value loaded in the Capture-IR state is the fixed binary value 10000001.
Shift-IR
Upon entry to the Shift-IR state, the instruction register is placed in the scan path between TDI and TDO and,
on the first falling edge of TCK, TDO goes from the high-impedance state to an active state. TDO enables to
the logic level present in the least significant bit of the instruction register.
While in the stable Shift-IR state, instruction data is serially shifted through the instruction register on each TCK
cycle. The first shift occurs on the first rising edge of TCK after entry to the Shift-IR state (i.e., no shifting occurs
during the TCK cycle in which the TAP controller changes from Capture-IR to Shift-IR or from Exit2-IR to
Shift-IR). The last shift occurs on the rising edge of TCK upon which the TAP controller exits the Shift-IR state.
Exit1-IR, Exit2-IR
The
Exit1-IR and Exit2-IR states are temporary states that end an instruction-register scan. It is possible to
return to the Shift-IR state from either Exit1-IR or Exit2-IR without recapturing the instruction register.
On the first falling edge of TCK after entry to Exit1-IR, TDO goes from the active state to the high-impedance
state.
Pause-IR
No specific function is performed in the stable Pause-IR state, in which the TAP controller can remain indefinitely.
The Pause-IR state suspends and resumes instruction-register scan operations without loss of data.
Update-IR
The current instruction is updated and takes effect on the falling edge of TCK following entry to the Update-IR
state.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74ABT8244 | Scan Test Devices With Octal Buffers(掃描測試裝置(帶八緩沖器)) |
| SN54ABT828 | 10-Bit Buffers/Drivers With 3-State Outputs(10位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| SN74ABT828 | 10-Bit Buffers/Drivers With 3-State Outputs(10位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| SN54ABT834 | 8-Bit To 9-Bit Parity Bus Transceivers(8-9奇偶總線收發(fā)器) |
| SN74ABT834 | 8-Bit To 9-Bit Parity Bus Transceivers(8-9奇偶總線收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABT8245 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
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