參數(shù)資料
型號(hào): SN54ABTH182646A
廠商: Texas Instruments, Inc.
英文描述: Scan Test Devices With 18 Bit Universal Bus Transceivers( 掃描檢測(cè)裝置,帶18位收發(fā)器和寄存器)
中文描述: 掃描測(cè)試設(shè)備與18位通用總線收發(fā)器(掃描檢測(cè)裝置,帶18位收發(fā)器和寄存器)
文件頁數(shù): 12/37頁
文件大?。?/td> 842K
代理商: SN54ABTH182646A
SN54ABTH18646A, SN54ABTH182646A, SN74ABTH18646A, SN74ABTH182646A
SCAN TEST DEVICES WITH
18-BIT TRANSCEIVERS AND REGISTERS
SCBS166D – AUGUST 1993 – REVISED JULY 1996
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
boundary-control register
The boundary-control register (BCR) is three bits long. The BCR is used in the context of the boundary-run test
(RUNT) instruction to implement additional test operations not included in the basic SCOPE
instruction set.
Such operations include PRPG, PSA, and binary count up (COUNT). Table 4 shows the test operations that
are decoded by the BCR.
During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is
reset to the binary value 010, which selects the PSA test operation. The BCR order of scan is shown in
Figure 4.
Bit 0
(LSB)
TDO
TDI
Bit 1
Bit 2
(MSB)
Figure 4. Boundary-Control Register Order of Scan
bypass register
The bypass register is a 1-bit scan path that can be selected to shorten the length of the system scan path,
reducing the number of bits per test pattern that must be applied to complete a test operation. During
Capture-DR, the bypass register captures a logic 0. The bypass register order of scan is shown in
Figure 5.
Bit 0
TDO
TDI
Figure 5. Bypass Register Order of Scan
相關(guān)PDF資料
PDF描述
SN54ABTH1826520A Scan Test Devices With 18 Bit Universal Bus Transceivers and Registers( 掃描檢測(cè)裝置,帶18位總線收發(fā)器和寄存器)
SN74ABTH1826520A Scan Test Devices With 18 Bit Universal Bus Transceivers And Registers( 掃描檢測(cè)裝置帶18位總線收發(fā)器和寄存器)
SN54ABTH18652A Scan Test Devices With 18 Bit Universal Bus Transceivers and Registers( 掃描檢測(cè)裝置,帶18位總線收發(fā)器和寄存器)
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