參數(shù)資料
型號: SPC5604PEF0MLL6
廠商: Freescale Semiconductor
文件頁數(shù): 21/104頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 512KB FLASH 100LQFP
標(biāo)準(zhǔn)包裝: 90
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 64MHz
連通性: CAN,F(xiàn)lexRay,LIN,SPI,UART/USART
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 68
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64K x 8
RAM 容量: 40K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 30x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 100-LQFP
包裝: 托盤
MPC5604P Microcontroller Data Sheet, Rev. 8
Freescale
23
2.2.2
System pins
Table 3 and Table 4 contain information on pin functions for the MPC5604P devices. The pins listed in Table 4 are
single-function pins. The pins shown in Table 5 are multi-function pins, programmable via their respective Pad Configuration
Register (PCR) values.
VSS_LV_COR0
1.2 V Decoupling pins for core logic. Decoupling capacitor
must be connected between these pins and the nearest
VDD_LV_COR pin.
11
17
VDD_LV_COR1
1.2 V Decoupling pins for core logic. Decoupling capacitor
must be connected between these pins and the nearest
VSS_LV_COR pin.
65
93
VSS_LV_COR1
1.2 V Decoupling pins for core logic. Decoupling capacitor
must be connected between these pins and the nearest
VDD_LV_COR pin.
66
94
VDD_LV_COR2
1.2 V Decoupling pins for core logic. Decoupling capacitor
must be connected between these pins and the nearest
VSS_LV_COR pin.
92
131
VSS_LV_COR2
1.2 V Decoupling pins for core logic. Decoupling capacitor
must be connected between these pins and the nearest
VDD_LV_COR pin.
93
132
VDD_LV_COR3
1.2 V Decoupling pins for on-chip PLL modules. Decoupling
capacitor must be connected between this pin and
VSS_LV_COR3.
25
36
VSS_LV_COR3
1.2 V Decoupling pins for on-chip PLL modules. Decoupling
capacitor must be connected between this pin and
VDD_LV_COR3.
24
35
1 Analog supply/ground and high/low reference lines are internally physically separate, but are shorted via a
double-bonding connection on VDD_HV_ADCx/VSS_HV_ADCx pins.
2 Not available on 100-pin package.
Table 4. System pins
Symbol
Description
Direction
Pad speed1
Pin
SRC = 0 SRC = 1
100-pin
144-pin
Dedicated pins. Available on 100-pin and 144-pin package.
MDO[0]
Nexus Message Data Output—line 0
Output only
Fast
9
NMI
Non-Maskable Interrupt
Input only
Slow
1
XTAL
Analog output of the oscillator amplifier
circuit; needs to be grounded if oscillator
is used in bypass mode
——
18
29
Table 3. Supply pins (continued)
Supply
Pin
Symbol
Description
100-pin
144-pin
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