參數資料
型號： SPC5604PEF0MLL6
廠商： Freescale Semiconductor
文件頁數： 48/104頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 512KB FLASH 100LQFP
標準包裝： 90
系列： MPC56xx Qorivva
核心處理器： e200z0h
芯體尺寸： 32-位
速度： 64MHz
連通性： CAN，F(xiàn)lexRay，LIN，SPI，UART/USART
外圍設備： DMA，POR，PWM，WDT
輸入/輸出數： 68
程序存儲器容量： 512KB（512K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 64K x 8
RAM 容量： 40K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數據轉換器： A/D 30x10b
振蕩器型： 內部
工作溫度： -40°C ~ 125°C
封裝/外殼： 100-LQFP
包裝： 托盤
MPC5604P Microcontroller Data Sheet, Rev. 8
Freescale
48
Semiconductor Equipment and Materials International
3081 Zanker Road
San Jose, CA 95134
U.S.A.
(408) 943-6900
MIL-SPEC and EIA/JESD (JEDEC) specifications are available from Global Engineering Documents at
800-854-7179 or 303-397-7956.
JEDEC specifications are available on the WEB at http://www.jedec.org.
1. C.E. Triplett and B. Joiner, An Experimental Characterization of a 272 PBGA Within an Automotive Engine Controller
Module, Proceedings of SemiTherm, San Diego, 1998, pp. 47–54.
2. G. Kromann, S. Shidore, and S. Addison, Thermal Modeling of a PBGA for Air-Cooled Applications, Electronic
Packaging and Production, pp. 53–58, March 1998.
3. B. Joiner and V. Adams, Measurement and Simulation of Junction to Board Thermal Resistance and Its Application in
Thermal Modeling, Proceedings of SemiTherm, San Diego, 1999, pp. 212–220.
3.6
Electromagnetic interference (EMI) characteristics
3.7
Electrostatic discharge (ESD) characteristics
Table 12. EMI testing specifications
Symbol
Parameter
Conditions
Clocks
Frequency
Level
(Max)
Unit
VEME Radiated emissions Device configuration, test
conditions and EM testing per
standard IEC61967-2
Supply voltage = 5 V DC
Ambient temperature = 25 °C
Worst-case orientation
fOSC 8MHz
fCPU 64 MHz
No PLL frequency
modulation
150 kHz–150 MHz
16
dBV
150–1000 MHz
15
IEC Level
M
—
fOSC 8MHz
fCPU 64 MHz
1% PLL frequency
modulation
150 kHz–150 MHz
15
dBV
150–1000 MHz
14
IEC Level
M
—
Table 13. ESD ratings1,2
1 All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated
Circuits.
2 A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification requirements. Complete DC parametric and functional testing shall be performed per applicable
device specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Symbol
Parameter
Conditions
Value
Unit
VESD(HBM)
SR Electrostatic discharge (Human Body Model)
—
2000
V
VESD(CDM)
SR Electrostatic discharge (Charged Device Model)
—
750 (corners)
V
500 (other)
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參數描述
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