SPL505YC25
....................Document #: 001-03543 Rev *E Page 20 of 27
AC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
Crystal
TDC
XIN Duty Cycle
The device will operate reliably with
input duty cycles up to 30/70 but the
REF clock duty cycle will not be within
specification
47.5
52.5
%
TPERIOD
XIN Period
When XIN is driven from an external
clock source
69.841
71.0
ns
TR/TF
XIN Rise and Fall Times
Measured between 0.3VDD and 0.7VDD
–10.0
ns
TCCJ
XIN Cycle to Cycle Jitter
As an average over 1-
s duration
–
500
ps
LACC
Long-term Accuracy
–
300
ppm
CPU at 0.7V
TDC
CPUT and CPUC Duty Cycle
Measured at 0V differential @ 0.1s
45
55
%
TPERIOD
100 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
9.99900
10.0100
ns
TPERIOD
133 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
7.49925
7.50075
ns
TPERIOD
166 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
5.99940
6.00060
ns
TPERIOD
200 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
4.99950
5.00050
ns
TPERIOD
266 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
3.74963
3.75038
ns
TPERIOD
333 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
2.99970
3.00030
ns
TPERIOD
400 MHz CPUT and CPUC Period
Measured at 0V differential @ 0.1s
2.49975
2.50025
ns
TPERIODSS
100 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
10.02406 10.02607
ns
TPERIODSS
133 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
7.51804
7.51955
ns
TPERIODSS
166 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
6.01444
6.01564
ns
TPERIODSS
200 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
5.01203
5.01303
ns
TPERIODSS
266 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
3.75902
3.75978
ns
TPERIODSS
333 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
3.00722
3.00782
ns
TPERIODSS
400 MHz CPUT and CPUC Period, SSC
Measured at 0V differential @ 0.1s
2.50601
2.50652
ns
TPERIODAbs
100 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
9.91400
10.0860
ns
TPERIODAbs
133 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
7.41425
7.58575
ns
TPERIODAbs
166 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
5.91440
6.08560
ns
TPERIODAbs
200 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
4.91450
5.08550
ns
TPERIODAbs
266 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
3.66463
3.83538
ns
TPERIODAbs
333 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
2.91470
3.08530
ns
TPERIODAbs
400 MHz CPUT and CPUC Absolute period
Measured at 0V differential @ 1 clock
2.41475
2.58525
ns
TPERIODSSAbs 100 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
9.91406
10.1362
ns
TPERIODSSAbs 133 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
7.41430
7.62340
ns
TPERIODSSAbs 166 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
5.91444
6.11572
ns
TPERIODSSAbs 200 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
4.91453
5.11060
ns
TPERIODSSAbs 266 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
3.66465
3.85420
ns
TPERIODSSAbs 333 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
2.91472
3.10036
ns
TPERIODSSAbs 400 MHz CPUT and CPUC Absolute period, SSC Measured at 0V differential @ 1 clock
2.41477
2.59780
ns
TCCJ
CPUT/C Cycle to Cycle Jitter
Measured at 0V differential
–
85
ps
TCCJ2
CPU2_ITP Cycle to Cycle Jitter
Measured at 0V differential
–
125
ps
LACC
Long-term Accuracy
Measured at 0V differential
–
100
ppm
TSKEW2
CPU2_ITP to CPU0 Clock Skew
Measured at 0V differential
–
100
ps
TSKEW2
CPU2_ITP to CPU0 Clock Skew
Measured at 0V differential
–
150
ps