REV. 5.0.3 2.0 FUNCTIONAL DESCRIPTIONS 2.1 Host Data Bus Interface The host inte" />
參數(shù)資料
型號: ST16C650ACQ48-F
廠商: Exar Corporation
文件頁數(shù): 49/50頁
文件大?。?/td> 0K
描述: IC UART FIFO 32B 48TQFP
標(biāo)準(zhǔn)包裝: 250
特點(diǎn): *
通道數(shù): 1,UART
FIFO's: 32 字節(jié)
規(guī)程: 打印機(jī),RS232,RS422,RS485
電源電壓: 2.9 V ~ 5.5 V
帶并行端口:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
其它名稱: 1016-1662
ST16C650ACQ48-F-ND
ST16C650A
8
2.90V TO 5.5V UART WITH 32-BYTE FIFO
REV. 5.0.3
2.0 FUNCTIONAL DESCRIPTIONS
2.1
Host Data Bus Interface
The host interface is 8 data bits wide with 3 address lines and control signals to execute bus read and write
transactions. The 650A supports 2 type of host interfaces: Intel and PC mode. The Intel bus interface is
selected by connecting SEL to a logic 1. The Intel bus interconnections are shown in Figure 3. The special PC
mode is selected when SEL is connected to a logic 0. The PC mode interconnections are shown in Figure 4.
FIGURE 3. ST16C650A INTEL BUS INTERCONNECTIONS
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
IOR*
IOW*
RESET
D0
D1
D2
D3
D4
D5
D6
D7
IOR#
IOW#
A0
A1
A2
CS2#
RESET
VCC
CS0
CS1
AS#
IOR
IOW
INT
RCLK
BAUDOUT#
SEL
VCC
GND
CS#
OP2#
OP1#
DSR#
CTS#
RTS#
DTR#
RX
TX
RI#
CD#
FIGURE 4. ST16C650A PC MODE INTERCONNECTIONS
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A14
A15
AEN#
IOW#
IOR#
RESET
D0
D1
D2
D3
D4
D5
D6
D7
IOW#
A0
A1
A2
RESET
VCC
CS0
CS1
AS#
IOR
IOW
IRQn
IRQA
SEL
VCC
GND
IOR#
IRQB
IRQC
IRQ4
IRQ3
A3
A4
A5
A6
A7
A8
A9
AEN*
OP1#
RI#
CD#
DSR#
CTS#
RX
TX
RTS#
DTR#
S1
S2
S3
VCC
GND
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