參數(shù)資料
型號: ST72774S9T1/XXX
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP44
封裝: TQFP-44
文件頁數(shù): 30/144頁
文件大小: 1280K
代理商: ST72774S9T1/XXX
ST72774/ST727754/ST72734
125/144
8-BIT A/D CONVERTER (ADC) (Cont’d)
4.10.6 Register Description
CONTROL/STATUS REGISTER (CSR)
Read /Write
Reset Value: 0000 0000 (00h)
Bit 7 = COCO
Conversion Complete
This bit is set by hardware. It is cleared by software
reading the result in the DR register or writing to
the CSR register.
0: Conversion is not complete
1: Conversion can be read from the DR register
Bit 6 = Reserved.
must always be cleared.
Bit 5 = ADON
A/D Converter On
This bit is set and cleared by software.
0: A/D converter is switched off
1: A/D converter is switched on
Bit 4 = Reserved.
must always be cleared.
Bit 3:0 = CH[3:0]
Channel Selection
These bits are set and cleared by software. They
select the analog input to convert.
Note: The number of pins AND the channel selection var-
ies according to the device. Refer to the device
pinout.
DATA REGISTER (DR)
Read Only
Reset Value: 0000 0000 (00h)
Bit 7:0 = D[7:0]
Analog Converted Value
This register contains the converted analog value
in the range 00h to FFh.
Note: Reading this register reset the COCO flag.
Table 30. ADC Register Map
70
COCO
0
ADON
0
CH3
CH2
CH1
CH0
Channel Pin*
CH3
CH2
CH1
CH0
AIN0
0
AIN1
0
1
AIN2
0
1
0
AIN3
0
1
AIN4
0
1
0
AIN5
0
1
0
1
AIN6
0
1
0
AIN7
0
1
AIN8
1
0
AIN9
1
0
1
AIN10
1
0
1
0
AIN11
1
0
1
AIN12
1
0
AIN13
1
0
1
AIN14
1
0
AIN15
1
70
D7
D6
D5
D4
D3
D2
D1
D0
Address
(Hex.)
Register
Name
76
5
4
32
10
0A
ADCDR
Reset Value
D7
0
D6
0
D5
0
D4
0
D3
0
D2
0
D1
0
D0
0
0B
ADCCSR
Reset Value
COCO
0
-
0
ADON
0
-
0
CH3
0
CH2
0
CH1
0
CH0
0
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