th May 2012 www.semtech.com 21 SX1504/SX1505/SX1506 4/8/16 Channel GP" />
參數(shù)資料
型號(hào): SX1506I091TRT
廠商: Semtech
文件頁數(shù): 14/31頁
文件大?。?/td> 0K
描述: IC GPIO EXP I2C 16CH 28UTQFN
標(biāo)準(zhǔn)包裝: 1
接口: I²C
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 2.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-UFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-QFN-UT(4x4)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: SX1506I091DKR
WIRELESS & SENSING
Rev 3 – 16
th May 2012
www.semtech.com
21
SX1504/SX1505/SX1506
4/8/16 Channel GPIO
Addr
Name
Default
Bits
Description
0x04
Reserved
0xXX
7:0
Unused
0x05
RegInterruptMask
0xFF
7:0
Configures which [input-configured] IO will trigger an interrupt on NINT pin
0 : An event on this IO will trigger an interrupt
1 : An event on this IO will NOT trigger an interrupt
7:6
Edge sensitivity of I/O[7]
5:4
Edge sensitivity of I/O[6]
3:2
Edge sensitivity of I/O[5]
0x06
RegSenseHigh
0x00
1:0
Edge sensitivity of I/O[4]
00 : None
01 : Rising
10 : Falling
11 : Both
7:6
Edge sensitivity of I/O[3]
5:4
Edge sensitivity of I/O[2]
3:2
Edge sensitivity of I/O[1]
0x07
RegSenseLow
0x00
1:0
Edge sensitivity of I/O[0]
00 : None
01 : Rising
10 : Falling
11 : Both
0x08
RegInterruptSource
0x00
7:0
Interrupt source (from IOs set in RegInterruptMask)
0 : No interrupt has been triggered by this IO
1 : An interrupt has been triggered by this IO (an event as configured in relevant
RegSense register occured).
Writing '1' clears the bit in RegInterruptSource and in RegEventStatus
When all bits are cleared, NINT signal goes back high.
0x09
RegEventStatus
0x00
7:0
Event status of all IOs.
0 : No event has occured on this IO
1 : An event has occured on this IO (an edge as configured in relevant RegSense
register occured).
Writing '1' clears the bit in RegEventStatus and in RegInterruptSource if relevant.
If the edge sensitivity of the IO is changed, the bit(s) will be cleared automatically
7:6
Reserved. Must be set to 0 (default value)
5:4
PLDModeHigh (applies to I/O[7:4])
00 : PLD disabled – Normal GPIO mode for I/O[7:4]
01 : PLD 2-to-1 mode – I/O[6] is a decode of I/O[5:4] as defined in RegPLDTable0
10 : PLD 3-to-1 mode – I/O[7] is a decode of I/O[6:4] as defined in RegPLDTable1
11 : Reserved
3:2
Reserved. Must be set to 0 (default value)
0x10
RegPLDMode
0x00
1:0
PLDModeLow (applies to I/O[3:0])
00 : PLD disabled – Normal GPIO mode for I/O[3:0]
01 : PLD 2-to-1 mode – I/O[2] is a decode of I/O[1:0] as defined in RegPLDTable0
10 : PLD 3-to-1 mode – I/O[3] is a decode of I/O[2:0] as defined in RegPLDTable2
11 : PLD 3-to-2 mode – I/O[4:3] are decodes of I/O[2:0] as defined in RegPLDTable3
and RegPLDTable4
7
Value to be output on I/O[6] when I/O[5:4] = 11
6
Value to be output on I/O[6] when I/O[5:4] = 10
5
Value to be output on I/O[6] when I/O[5:4] = 01
4
Value to be output on I/O[6] when I/O[5:4] = 00
Applies only when
PLDModeHigh is set to PLD 2-
to-1 mode
3
Value to be output on I/O[2] when I/O[1:0] = 11
2
Value to be output on I/O[2] when I/O[1:0] = 10
1
Value to be output on I/O[2] when I/O[1:0] = 01
0x11
RegPLDTable0
0x00
0
Value to be output on I/O[2] when I/O[1:0] = 00
Applies only when
PLDModeLow is set to PLD 2-
to-1 mode
7
Value to be output on I/O[7] when I/O[6:4] = 111
6
Value to be output on I/O[7] when I/O[6:4] = 110
5
Value to be output on I/O[7] when I/O[6:4] = 101
4
Value to be output on I/O[7] when I/O[6:4] = 100
3
Value to be output on I/O[7] when I/O[6:4] = 011
2
Value to be output on I/O[7] when I/O[6:4] = 010
1
Value to be output on I/O[7] when I/O[6:4] = 001
0x12
RegPLDTable1
0x00
0
Value to be output on I/O[7] when I/O[6:4] = 000
Applies only when
PLDModeHigh is set to PLD 3-
to-1 mode
7
Value to be output on I/O[3] when I/O[2:0] = 111
6
Value to be output on I/O[3] when I/O[2:0] = 110
5
Value to be output on I/O[3] when I/O[2:0] = 101
4
Value to be output on I/O[3] when I/O[2:0] = 100
3
Value to be output on I/O[3] when I/O[2:0] = 011
2
Value to be output on I/O[3] when I/O[2:0] = 010
1
Value to be output on I/O[3] when I/O[2:0] = 001
0x13
RegPLDTable2
0x00
0
Value to be output on I/O[3] when I/O[2:0] = 000
Applies only when
PLDModeLow is set to PLD 3-
to-1 mode
7
Value to be output on I/O[4] when I/O[2:0] = 111
6
Value to be output on I/O[4] when I/O[2:0] = 110
0x14
RegPLDTable3
0x00
5
Value to be output on I/O[4] when I/O[2:0] = 101
Applies only when
PLDModeLow is set to PLD 3-
to-2 mode
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