th May 2012 www.semtech.com 23 SX1504/SX1505/SX1506 4/8/16 Channel GP" />
參數(shù)資料
型號(hào)： SX1506I091TRT
廠商： Semtech
文件頁(yè)數(shù)： 16/31頁(yè)
文件大?。?/td> 0K
描述： IC GPIO EXP I2C 16CH 28UTQFN
標(biāo)準(zhǔn)包裝： 1
接口： I²C
輸入/輸出數(shù)： 16
中斷輸出： 是
頻率 - 時(shí)鐘： 400kHz
電源電壓： 2.5 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-UFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 28-QFN-UT（4x4）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： SX1506I091DKR
WIRELESS & SENSING
Rev 3 – 16
th May 2012
www.semtech.com
23
SX1504/SX1505/SX1506
4/8/16 Channel GPIO
Addr
Name
Default
Bits
Description
0x03
RegDirA
0xFF
7:0
Configures direction for each IO.
0 : IO is configured as an output
1 : IO is configured as an input
0x04
RegPullUpB
0x00
7:0
Enables the pull-up for each IO
0 : Pull-up is disabled
1 : Pull-up is enabled
0x05
RegPullUpA
0x00
7:0
Enables the pull-up for each IO
0 : Pull-up is disabled
1 : Pull-up is enabled
0x06
RegPullDownB
0x00
7:0
Enables the pull-down for each IO
0 : Pull-down is disabled
1 : Pull-down is enabled
0x07
RegPullDownA
0x00
7:0
Enables the pull-down for each IO
0 : Pull-down is disabled
1 : Pull-down is enabled
0x08
RegInterruptMaskB
0xFF
7:0
Configures which [input-configured] IO will trigger an interrupt on NINT pin
0 : An event on this IO will trigger an interrupt
1 : An event on this IO will NOT trigger an interrupt
0x09
RegInterruptMaskA
0xFF
7:0
Configures which [input-configured] IO will trigger an interrupt on NINT pin
0 : An event on this IO will trigger an interrupt
1 : An event on this IO will NOT trigger an interrupt
7:6
Edge sensitivity of I/O[15]
5:4
Edge sensitivity of I/O[14]
3:2
Edge sensitivity of I/O[13]
0x0A
RegSenseHighB
0x00
1:0
Edge sensitivity of I/O[12]
00 : None
01 : Rising
10 : Falling
11 : Both
7:6
Edge sensitivity of I/O[7]
5:4
Edge sensitivity of I/O[6]
3:2
Edge sensitivity of I/O[5]
0x0B
RegSenseHighA
0x00
1:0
Edge sensitivity of I/O[4]
00 : None
01 : Rising
10 : Falling
11 : Both
7:6
Edge sensitivity of I/O[11]
5:4
Edge sensitivity of I/O[10]
3:2
Edge sensitivity of I/O[9]
0x0C
RegSenseLowB
0x00
1:0
Edge sensitivity of I/O[8]
00 : None
01 : Rising
10 : Falling
11 : Both
7:6
Edge sensitivity of I/O[3]
5:4
Edge sensitivity of I/O[2]
3:2
Edge sensitivity of I/O[1]
0x0D
RegSenseLowA
0x00
1:0
Edge sensitivity of I/O[0]
00 : None
01 : Rising
10 : Falling
11 : Both
0x0E
RegInterruptSourceB
0x00
7:0
Interrupt source (from IOs set in RegInterruptMaskB)
0 : No interrupt has been triggered by this IO
1 : An interrupt has been triggered by this IO (an event as configured in relevant
RegSense register occured).
Writing '1' clears the bit in RegInterruptSourceB and in RegEventStatusB
When all bits of both RegInterruptSourceA/B are cleared, NINT signal goes back high.
0x0F
RegInterruptSourceA
0x00
7:0
Interrupt source (from IOs set in RegInterruptMaskA)
0 : No interrupt has been triggered by this IO
1 : An interrupt has been triggered by this IO (an event as configured in relevant
RegSense register occured).
Writing '1' clears the bit in RegInterruptSourceA and in RegEventStatusA
When all bits of both RegInterruptSourceA/B are cleared, NINT signal goes back high.
0x10
RegEventStatusB
0x00
7:0
Event status of all IOs.
0 : No event has occured on this IO
1 : An event has occured on this IO (an edge as configured in relevant RegSense
register occured).
Writing '1' clears the bit in RegEventStatusB and in RegInterruptSourceB if relevant.
If the edge sensitivity of the IO is changed, the bit(s) will be cleared automatically
0x11
RegEventStatusA
0x00
7:0
Event status of all IOs.
0 : No event has occured on this IO
1 : An event has occured on this IO (an edge as configured in relevant RegSense
register occured).
Writing '1' clears the bit in RegEventStatusA and in RegInterruptSourceA if relevant.
If the edge sensitivity of the IO is changed, the bit(s) will be cleared automatically
0x20
0x00
7:6
Reserved. Must be set to 0 (default value)
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