參數(shù)資料
型號： T431616E-7CG
廠商： TM Technology, Inc.
英文描述： 1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM
中文描述： 100萬× 16內存為512k × 16Bit的X 2Banks同步DRAM
文件頁數(shù)： 8/74頁
文件大?。?/td> 781K
代理商： T431616E-7CG
TE
CH
tm
T431616D/E
TM Technology Inc. reserves the right
P. 8
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
CLK
DQM
COMMAND
CAS# latency=1
tCK1, DQ's
T0
T 1
T2
T3
T4
T5
T6
T7
T8
NOP
NOP
NOP
READ A
WRITE A
NOP
NOP
NOP
ABANKA
DIN A0
DIN A1
DIN A2
DIN A3
DIN A0
DIN A1
DIN A2
DIN A3
Must be Hi-Z before
the Write Command
1 Clk Interval
CAS# latency=2
tCK2, DQ's
: "H" or "L"
Read to Write Interval
(Burst Length
≥
4, CAS# Latency = 1, 2)
CLK
DQM
COMMAND
CAS# latency=1
tCK1, DQ's
T0
T 1
T2
T3
T4
T5
T6
T7
T8
NOP
READ A
NOP
WRITE B
NOP
NOP
NOP
DIN B0
DIN B1
DIN B2
DIN B3
DIN B0
DIN B1
DIN B2
DIN B3
Must be Hi-Z before
the Write Command
CAS# latency=2
tCK2, DQ's
: "H" or "L"
NOP
NOP
DOUT A0
Read to Write Interval
(Burst Length
≥
4, CAS# Latency = 1, 2)
command to the same bank. The following figure shows the optimum time that BankPrecharge/ PrechargeAll
command is issued in different CAS# latency.
A read burst without the auto precharge function may be interrupted by a BankPrecharge/ PrechargeAll
CLK
COMMAND
CAS# la tency=2
tCK2, DQ's
T0
T 1
T2
T3
T4
T5
T6
T7
T8
READ A
NOP
NOP
NOP
NOP
Activate
NOP
NOP
Precharge
CAS# la tency=3
tCK3, DQ's
DOUT A0
DOUT A1
DOUT A2
DOUT A3
DOUT A0
DOUT A1
DOUT A2
DOUT A3
DOUT A0
DOUT A1
DOUT A2
DOUT A3
ADDR ESS
CAS# latency=1
tCK1, DQ's
t
RP
Bank,
Col A
Bank (s)
Bank,
Row
Read to Precharge
(CAS# Latency = 1, 2, 3)
相關PDF資料
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