參數資料
型號: T8533
英文描述: T8533/34 Quad Programmable Line Card Signal Processor
中文描述: T8533/34四線卡可編程信號處理器
文件頁數: 7/48頁
文件大?。?/td> 890K
代理商: T8533
Preliminary Data Sheet
July 2001
Signal Processor
T8533/34 Quad Programmable Line Card
Agere Systems Inc.
7
Pin Information
(continued)
5-8194(F)
Figure 3. 68-Pin PLCC Pin Diagram
Table 3. Pin Assignments, 68-Pin PLCC, Per-Channel Functions
Ckt
Name
Type
Name/Description
a
21 34 35 48
b
c
d
AGND
GND
Analog Ground.
A common AGND, DGND, SGND plane is highly recom-
mended.
PWR
5 V Analog Power Supply.
I
Transmit Analog Input.
For complex terminations, this node requires a 10 M
or 20 M
resistance to AGND.
O
Receive Analog Output, Positive Polarity.
O
Receive Analog Output, Negative Polarity.
I/O
SLIC Control Pin 0.
I/O
SLIC Control Pin 1.
I/O
SLIC Control Pin 2.
I/O
SLIC Control Pin 3.
I/O
SLIC Control Pin 4.
I/O
SLIC Control Pin 5.
20 33 36 49
19 32 37 50
V
DD
VF
X
I
18 31 38 51
17 30 39 52 VF
R
ON
16 29 41 53
15 27 42 54
9
26 43 61
8
25 44 63
7
23 46 64
6
22 47 62
VF
R
OP
SLIC0
SLIC1
SLIC2
SLIC3
SLIC4
SLIC5
6
4 3 2 1 68 67 66 6564
5
M
D
S
S
R
I
S
S
D
7
8
9
63 6261
V
D
D
S
S
C
S
S
D
40
38
37
36
35
34
33
32
31
30
39
V
D
b
V
X
I
S
S
V
R
O
V
R
O
S
S
A
41 42 43
29
28
27
V
X
I
V
D
c
V
D
V
R
O
V
R
O
V
D
S
A
23
24
25
26
21
22
20
19
18
17
16
15
14
13
SLIC0a
VF
R
ONa
V
DD
a
AGNDa
FILTV
PVCOIN
PVCO
SGND
SLIC1a
SLIC5b
SLIC4b
DGND
SLIC3b
SLIC2b
VF
R
OPa
VF
X
Ia
12
11
10
PLLT
47
46
45
44
49
48
50
51
52
53
54
55
56
57
SLIC1d
SLIC0d
VF
X
Id
V
DD
d
DR
DX
DGND
BCLK
FS
V
DD
AGNDd
SLIC5c
SLIC4c
DGND
SLIC3c
VF
R
ONd
VF
R
OPd
58
59
60
T8534
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