參數(shù)資料
型號(hào)： TAS3204PAG
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁(yè)數(shù)： 63/76頁(yè)
文件大?。?/td> 1224K
代理商： TAS3204PAG
SLES197C – APRIL 2007 – REVISED MARCH 2011
www.ti.com
Table 12-25. Extended Special Fucntion Registers (ESFR) (continued)
ESFR
MAPPED_TO
NO. OF
DIRECTION
CONNECTING
REGISTER TYPE
DESCRIPTION
BITS
BLOCK
8-bit asynchronous rstz
Bit definition follows functional spec
A2
SCLK_t
8
OUT
CLOCK
positive edge triggered
definition for specification SCLK field
Reset Low
4-bit asynchronous rstz
A3
addr_sel_t
4
OUT
DELAY_MEM
positive edge triggered
Delay memory select lines
Reset Low
8-bit asynchronous rstz
A4
addr_t
8
OUT
DELAY_MEM
positive edge triggered
Delay memory address bus
Reset Low
5-bit asynchronous rstz
A5
addr_t
5
OUT
DELAY_MEM
positive edge triggered
Delay memory address bus high bits
Reset Low
2-bit asynchronous rstz
A6
vol_mode_i_t
2
OUT
VOLUME
positive edge triggered
Specify slew rate 0, 1, 2 (2048, 4096, 8192)
Reset Low
3-bit asynchronous rstz
A7
volume_index_i_t
3
OUT
VOLUME
positive edge triggered
Host control channel specification
Reset Low
8-bit asynchronous rstz
A9
8
OUT
VOLUME
positive edge triggered
Reset Low
8-bit asynchronous rstz
AA
vol_data_i_t
8
OUT
VOLUME
positive edge triggered
Reset Low
Volume coefficient
8-bit asynchronous rstz
AB
vol_data_i_t
8
OUT
VOLUME
positive edge triggered
Reset Low
4-bit asynchronous rstz
AC
vol_data_i_t
4
OUT
VOLUME
positive edge triggered
Reset Low
AD
To_MCU_i[7:0]
8
IN
DSP
NO REG – direct input
AE
To_MCU_i[15:8]
8
IN
DSP
NO REG – direct input
AF
To_MCU_i[23:16]
8
IN
DSP
NO REG – direct input
B1
To_MCU_i[31:24]
8
IN
DSP
NO REG – direct input
Data bus from DSP to the MCU
B2
To_MCU_i[39:32]
8
IN
DSP
NO REG – direct input
Bit 6
To_MCU_i[47:40]
8
IN
DSP
NO REG – direct input
Bit 7
To_MCU_i[53:48]
8
IN
DSP
NO REG – direct input
8-bit asynchronous rstz
B3
Data_to_DSP_o[7:0]
8
OUT
DSP
positive edge triggered
Reset Low
8-bit asynchronous rstz
B4
Data_to_DSP_o[15:0]
8
OUT
DSP
positive edge triggered
8-bit asynchronous rstz
B5
Data_to_DSP_o[23:16]
8
OUT
DSP
positive edge triggered
8-bit asynchronous rstz
B6
Data_to_DSP_o[31:24]
8
OUT
DSP
positive edge triggered
Reset Low
Data bus from MCU to the DSP
8-bit asynchronous rstz
B7
Data_to_DSP_o[39:32
8
OUT
DSP
positive edge triggered
Reset Low
8-bit asynchronous rstz
B9
Data_to_DSP_o[47:40]
8
OUT
DSP
positive edge triggered
Reset Low
8-bit asynchronous rstz
BA
Data_to_DSP_o[53:48]
8
OUT
DSP
positive edge triggered
Reset Low
8-bit asynchronous rstz
MCU uses these 16 bits to set DSP RAM
BB
MCU_addr_o[7:0]
8
OUT
DSP
positive edge triggered
and MCU I addresses
Reset Low
MCU uses these 16 bits to set DSP RAM
8-bit asynchronous rstz
and MCU I addresses
BC
MCU_addr_o[13:8]
8
OUT
DSP
positive edge triggered
Bit 10 of the address selects between audio
Reset Low
DSP coefficient and audio DSP data
memory
66
Copyright 2007–2011, Texas Instruments Incorporated
I2C Register Map
Product Folder Link(s): TAS3204
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