參數(shù)資料
型號(hào): TAS3204PAG
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁(yè)數(shù): 68/76頁(yè)
文件大?。?/td> 1224K
代理商: TAS3204PAG
SLES197C – APRIL 2007 – REVISED MARCH 2011
www.ti.com
13 Application Information
13.1 Schematics
Figure 13-1 shows a typical TAS3204 application. In this application the following conditions apply:
TAS3204 is in clock-master mode. The TAS3204 generates MCLK_OUT1, SCLK_OUT, and
LRCLOK_OUT.
XTAL_IN = 24.576 MHz
I2C register 0x00 contains the default settings, which means:
Audio data word size is 24-bit input and 24-bit output.
Serial data format is 2-channel, I2S for input and output.
I2C data transfer is approximately 400 kbps for both master and slave I2C interfaces.
Sample frequency (fS) is 48 kHz, which means that fLRCLK = 48 kHz and fSCLKIN = 3.072 MHz.
Application code and data are loaded from an external EEPROM using the master I2C interface.
Application commands come from the system MCU to the TAS3204 using the slave I2C interface.
Good design practice requires isolation between the digital and analog power as shown. Power supply
capacitors of 10
μF and 0.1 μF should be placed near the power supply pins AVDD (AVSS) and DVDD
(DVSS).
The TAS3204 reset needs external glitch protection. Also, reset going HIGH should be delayed until
TAS3204 internal power is good (~200
μs after power up). This is provided by the 1-k resistor, 1-μF
capacitor, and diode placed near the RESET pin.
It is recommended that a 4.7-
μF capacitor (fast ceramic type) be placed near pin 28 (VR_DIG). This pin
must not be used to source external components.
70
Application Information
Copyright 2007–2011, Texas Instruments Incorporated
Product Folder Link(s): TAS3204
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