參數(shù)資料
型號(hào)： TB1261F
廠商： Toshiba Corporation
英文描述： TOSHIBA BiCMOS INTEGRATED CIRCUIT, SILICON MONOLITHIC
中文描述： 東芝的BiCMOS集成電路，硅單片
文件頁數(shù)： 48/66頁
文件大?。?/td> 1544K
代理商： TB1261F
TB1261F/TB1262F
2002-6-30 48 / 66
TEXT STAGE (RGB Mute:0 / RGB cut off:128 / DC rest.:2(100%) / WPS:1(off))
Note
Items/Symbols
Bus
conditions
T1
V-BLK Pulse Output
Level
/ V
VBLK
H-BLK Pulse Output
Level
/ V
HBLK
T2
RGB Output Black
Level (0IRE DC)
/ V
BLACK
B cut off:128
DC rest.:2(100%)
Others: Preset
T3
RGB Output White
Level(100 IRE AC)
/ V
WHITE
DC rest.:2(100%)
Uni-Color:127
Color:0
WPS:1(off)
Others: Preset
T4
Cut-off Voltage
Variable Range
/
Δ
V
CUT+
/
Δ
V
CUT-
Color:64 Brt; 64
Others: Preset
T5
Drive Control
Variable Range
/ G
DR+
/ G
DR-
Uni-Color:127
Color:0
WPS:1(OFF)
Others: Preset
T6
ABCL Control
Voltage Range
/ V
ABCLH
/ V
ABCLL
ACL Gain
/ G
ACL
Color:0
WPS:1(OFF)
Others: Preset
T7
ABL Start Point
/ V
ABLP0
/ V
ABLP1
/ V
ABLP2
/ V
ABLP3
0/1/2/3
ABL Gain:3
Uni-Color:127
Color:0
WPS:1(OFF)
Others: Preset
T8
ABL Gain
/ V
ABLG0
/ V
ABLG1
/ V
ABLG2
/ V
ABLG3
00/01/10/11
Uni-Color:127
Color:0
WPS:1(OFF)
Others: Preset
Measurement methods
(1) Input a composite sync signal into Pin61.
(2) Measure the DC level of V/H blanking period at Pin14, that
is
"V
VBLK
" / "V
HBLK
".
All: Preset
RGB Mute:0
Color:0
(1) Input a 0(IRE) Y signal with sync into Pin61.
(2) Measure the DC level of picture period at Pin14, that is
"V
BLACK
".
RGB Mute:0
B cut off:128
(1) Input a 100(IRE)(=0.7Vp-p) Y signal with sync into Pin61.
(2) Measure the amplitude from 0 to 100IRE at Pin14, that is
"V
WHITE
".
RGB Mute:0
DC rest.:2(100%)
B Cut Off:0/255
(1) Input a 0(IRE) Y signal with sync into Pin61.
(2) Measure the DC level of picture period at Pin14 for B
Cut-off:255/0 , that is V
CUTMAX
/ V
CUTMIN
.
(3) Calculate;
"
Δ
V
CUT+
"=V
CUTMAX
-V
BLACK
V
CUT
-"=V
CUTMIN
-V
BLACK
(1) Input a 100(IRE) (=0.7Vp-p) Y signal with sync into Pin61.
(2) Measure the amplitude from 0 to 100IRE at Pin14 for B
drive127/0, that is V
DRMAX
/ V
DRMIN
.
(3) Calculate; "G
DR+
"=20*log(V
DRMAX
/V
WHITE
)
"G
DR-
"=20*log(V
DRMIN
/V
WHITE
)
"
Δ
RGB Mute:0
DC rest.:2(100%)
B Drive:0/127
RGB Mute:0
B cut off:128
DC rest.:2(100%)
ABL Gain:3
Uni-Color:127
(1) Input a 100(IRE) (=0.7Vp-p) Y signal with sync into Pin61.
(2) Decreasing the Pin31 voltage, measure the voltage at which
Pin14 output begins/stops decreasing, that is "VABCLH" /
"VABCLL".
(3) Measure the minimum amplitude of Pin14 output, that is
VACLMIN.
(4) Calculate; "GACL"=20*log(V
ACLMIN
/V
WHITE
)
RGB Mute:0
B cut off:128
DC rest.:2(100%)
ABL Start Point:
(1) Input a 0(IRE) Y signal with sync into Pin61.
(2) For ABL Point 0/1/2/3, decreasing the Pin31 voltage,
measure the voltage at which Pin14 output begins
decreasing, that is V
ABL1
/V
ABL2
/V
ABL3
/V
ABL4
.
(3) Calculate; "V
ABLP0
"=V
ABL1
-V
ABCLH
"V
ABLP1
"=V
ABL2
-V
ABCLH
"V
ABLP2
"=V
ABL3
-V
ABCLH
"V
ABLP3
"=V
ABL4
-V
ABCLH
RGB Mute:0
B cut off:128
DC rest.:2(100%)
ABL Gain:
(1) Input a 0(IRE) Y signal with sync into Pin61.
(2) For ABL Gain 0/1/2/3, measure the DC level of picture
period at Pin14 when Pin31 voltage is V
ABCLL
, that is
V
ABL5
/V
ABL6
/V
ABL7
/V
ABL8
.
(3) Calculate; "V
ABLG0
"=V
ABL5
-V
BLACK
"V
ABLG1
"=V
ABL6
-V
BLACK
"V
ABLG2
"=V
ABL7
-V
BLACK
"V
ABLG3
"=V
ABL8
-V
BLACK
相關(guān)PDF資料
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