參數(shù)資料
型號(hào)： TC7109IJL
廠商： TelCom Semiconductor, Inc.
英文描述： 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS
中文描述： 12位向上兼容的模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù)： 14/21頁(yè)
文件大小： 274K
代理商： TC7109IJL
3-104
TELCOM SEMICONDUCTOR, INC.
roll-over errors will be slightly worse than in the
±
4V case.
For large common-mode voltage ranges, the integrator
output swing must be reduced further. This will increase both
noise and roll-over errors. To improve performance,
±
6V
supplies may be used.
Integrating Capacitor
The integrating capacitor, C
INT
, should be selected to
give the maximum integrator output voltage swing that will
not saturate the integrator to within 0.3V from either supply.
A
±
3.5V to
±
4V integrator output swing is nominal for the
TC7109A, with
±
5V supplies and analog common con-
nected to GND. For 7-1/2 conversions per second (61.72
kHz internal clock frequency), nominal values C
INT
and C
AZ
are 0.15
μ
F and 0.33
μ
F, respectively. These values should
be changed if different clock frequencies are used to main-
tain the integrator output voltage swing. The value of C
INT
is
given by:
C
INT
=
The integrating capacitor must have low dielectric ab-
sorption to prevent roll-over errors. Polypropylene capaci-
tors give undetectable errors, at reasonable cost, up to
+85
°
C. Teflon
capacitors are recommended for the military
temperature range. While their dielectric absorption charac-
teristics vary somewhat between units, devices may be
selected to less than 0.5 count of error due to dielectric
absorption.
Integrating Resistor
The integrator and buffer amplifiers have a class A
output stage with 100
μ
A of quiescent current. They supply
20
μ
A of drive current with negligible nonlinearity. The
integrating resistor should be large enough to remain in this
very linear region over the input voltage range, but small
enough that undue leakage requirements are not placed on
the PC board. For 2.048V full-scale a 100 k
resistor is
recommended and for 409.6 mV full-scale a 20 k
resistor
is recommended. R
INT
may be selected for other values of
full scale by:
R
INT
=
Figure 10. TC7109A RC Oscillator
23
OSC
OUT
25
BUFFERED
OSC OUT
24
OSC
SEL
V+
22
OSC
IN
R
C
fOSC
Figure 11. TC7109A Crystal Oscillator
23
OSC
OUT
25
BUFFERED
OSC OUT
24
OSC
SEL
GND
V+
22
OSC
IN
58
CLOCK
CRYSTAL
÷
Test Input
The counter and its outputs may be tested easily. When
the TEST input is connected to GND, the internal clock is
disabled and the counter outputs are all forced into the HIGH
state. When the input returns to the 1/2 (V
+
–GND) voltage or
to V
+
and one clock is input, the counter outputs will all be
clocked to the LOW state.
The counter output latches are enabled when the TEST
input is taken to a level halfway between V
+
and GND,
allowing the counter contents to be examined anytime.
Component Value Selection
The integrator output swing for full-scale should be as
large as possible. For example, with
±
5V supplies and
COMMON connected to GND, the nominal integrator output
swing at full-scale is
±
4V. Since the integrator output can go
to 0.3V from either supply without significantly effecting
linearity, a 4V integrator output swing allows 0.7V for varia-
tions in output swing due to component value and oscillator
tolerances. With
±
5V supplies and a common-mode voltage
range of
±
1V required, the component values should be
selected to provide
±
3V integrator output swing. Noise and
(2048
3
Clock Period) (20
μ
A)
Integrator Output Voltage Swing
Full-Scale Voltage
20
μ
A
Auto-Zero Capacitor
As the auto-zero capacitor is made large, the system
noise is reduced. Since the TC7109A incorporates a zero
integrator cycle, the size of the auto-zero capacitor does not
affect overload recovery. The optimal value of the auto-zero
capacitor is between 2 and 4 times C
INT
. A typical value for
C
AZ
is 0.33
μ
F.
TC7109
TC7109A
12-BIT
μ
P-COMPATIBLE
ANALOG-TO-DIGITAL CONVERTERS
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