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參數(shù)資料
| 型號： | TC7109IJL |
| 廠商： | TelCom Semiconductor, Inc. |
| 英文描述： | 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS |
| 中文描述： | 12位向上兼容的模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 21/21頁 |
| 文件大?。?/td> | 274K |
| 代理商： | TC7109IJL |
3-111
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
TC7109A
B9–B12
POL, OR
B1-B8
LBEN
HBEN
8
6
ANALOG
IN
RUN/HOLD
SEND
MODE CE/
LOAD
+5V
TC7109A
B9–B12
POL, OR
B1–B8
LBEN
HBEN
8
6
8-BIT DATA BUS
ANALOG
IN
RUN/HOLD
SEND
MODE CE/
LOAD
+5V
TC7109A
B9–B12
POL, OR
B1–B8
LBEN
HBEN
8
6
ANALOG
IN
RUN/HOLD
SEND
MODE CE/
LOAD
+5V
TBRL DRR
GND
TBRE
RBR1–RBR8
SFD
TBR1–TBR8
SERIAL OUTPUT
SERIAL INPUT
6402 CMOS UART
2
3
Figure 21. Handshake Interface for Multiplexed Converters
Integrating Converter Features
The output of integrating ADCs represents the integral,
or average, of an input voltage over a fixed period of time.
Compared with techniques in which the input is sampled and
held, the integrating converter averages the effects of noise.
A second important characteristic is that time is used to
quantize the answer, resulting in extremely small nonlinearity
errors and no missing output codes. The integrating con-
verter also has very good rejection of frequencies whose
periods are an integral multiple of the measurement period.
This feature can be used to advantage in reducing line
frequency noise (Figure 22).
30
20
10
0
0.1/t
1/t
10/t
INPUT FREQUENCY
N
t = MEASUREMENT
PERIOD
Figure 22. Normal Mode Rejection of Dual-Slope Converter as a
Function of Frequency
TC7109
TC7109A
12-BIT
μ
P-COMPATIBLE
ANALOG-TO-DIGITAL CONVERTERS
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PDF描述 |
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| TC7109 | 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS |
| TC7109A | 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS |
| TC7109ACLW | 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS |
| TC7109ACPL | 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS |
| TC7109CLW | 12-BIT UP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS |
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