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參數(shù)資料
| 型號(hào)： | TDA9109A |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR |
| 中文描述： | 低費(fèi)用的I2C可控?fù)隙榷嗤斤@示器處理器 |
| 文件頁(yè)數(shù)： | 35/47頁(yè) |
| 文件大?。?/td> | 509K |
| 代理商： | TDA9109A |
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TDA9109A
35/47
Figure 16. AGC Loop Block Diagram
3.4 Basic Equations
In first approximation, the amplitude of the ramp
on Pin 23 (VOUT) is:
V
OUT
- VPOS= (V
OSC
- V
DCMID
)
.
(1 + 0.3 (V
AMP
))
where:
V
DCMID
= 7/16 V
REF
(middle value of the ramp on
Pin 22, typically 3.6V)
V
OSC
= V
22
(ramp with fixed amplitude)
V
AMP
= -1 for minimum vertical amplitude register
value and +1 for maximum
VPOS is calculated by:
VPOS = V
DCMID
+ 0.4 V
P
where V
P
= -1 for minimum vertical position regis-
ter value and +1 for maximum.
The current available on Pin 22 is:
I
OSC
=
8
.
V
REF.
C
OSC.
f
where C
OSC
= capacitor connected on Pin 22 and
f = synchronization frequency.
Geometric Corrections
The principle is represented in Figure 17.
Starting from the vertical ramp, a parabola-shaped
current is generated for E/W correction (also
known as Pin Cushion correction), dynamic hori-
zontal phase control correction, and vertical dy-
namic focus correction.
The parabola generator is made by an analog mul-
tiplier, the output current of which is equal to:
I = k
.
(
V
OUT
-
V
DCMID
)
2
where V
OUT
is the vertical output ramp (typically
between 2 and 5V) and V
DCMID
is 3.6V
(for V
REF-V
= 8.2V). TheVOUT sawtooth is typical-
ly centered on 3.6V. By changing the vertical posi-
tion, the sawtooth shifts by
±
0.4V.
To provide goodscreen geometry for any end user
adjustment, the TDA9109A has the “geometry
tracking” feature which allows generation of a dis-
symetric parabola depending on the vertical posi-
tion.
Due to the large output stage voltage range (E/W
Pin Cushion, Keystone, E/W Corner), the combi-
nation of the tracking function, maximum vertical
amplitude, maximum or minimum vertical position
and maximum gain on the DAC control may lead
to output stage saturation. This must be avoided
by limiting the output voltage with appropriate I
2
C
register values.
VSYNCIN 2
Synchro
Polarity
Oscillator
Discharge.
22
OSC
CAP
Sampling
Sampling
Capacitance
S Correction
sub-add 07/7bits
Cor_C
C Correction
18
BREATH
23
VOut
Vert. Amp
sub-.05/7bits
VMoiré
sub.0C/7bits
V Position
sub.06/7bits
Vlow
sawth
.
disch.
REF
Charge Current
Transconductance Amplifier
3
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