- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98229 > THS8083CPZP (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | THS8083CPZP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | POWER, THERMALLY ENHANCED, PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 47/61頁 |
| 文件大?。?/td> | 266K |
| 代理商： | THS8083CPZP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁當(dāng)前第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁
5–7
5.4.9.2 Closed Loop
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
f(HS)
HS locking range
15
100
kHz
t(acq)
Lock-in time
5
12
ms
t
Short term jitter
See Note 16
700 (p-p)
185 (rms)
ps
t(JCS)
Short-term jitter
TA = 25°C
1250 (p-p)
440 (rms)
ps
t(JCL)
Long term jitter
See Note 16
700 (pk-pk)
185 (rms)
ps
t(JCL)
Long-term jitter
See Note 16
TA = 25°C
1250 (p-p)
440 (rms)
ps
NOTE 16: PLL characterization:
Short term jitter in open loop or closed loop is defined as the variation within one PLL update period (= within the same video line) of
the clock rising edge. This is measured visually by capturing the clock and displaying it on a digital scope with a persistency of one
video line. Numerically the time instants of the rising edges, at a defined voltage level, of a number of clock cycles (N = 800) are
captured at high sampling rate. From these time instants, the average clock time period is calculated. The deviation between each
actual time instant and the ideal, based on the average clock time period, is defined as a statistically distributed jitter value along
one line. This jitter is measured on both DATACLK1 and DTOCLK3 outputs.
Long term jitter in closed loop is defined as the variation over one video frame of the Nth clock rising edge on each line. This is
measured by capturing the time instant that a defined level on the rising edge of the Nth clock after HS is reached on each line. The
same principle for calculation is used as for short term jitter but now for one sample taken on every line and N = 800 lines.
5.4.10 Typical Plots (25
°C and Measured for Standard VESA Graphics Formats)
NOTE: The THS8083 is configured for each video mode with I2C register settings as specified
in application note Using THS8083 for PC Graphics and Component Video Digitizing.
500
600
700
800
900
1000
1100
1200
1300
1400
1500
0
20406080
100
30 MHz Full-Scale
Sine Input
60 kHz Full-Scale
Ramp Input
Power
–
mW
0
50
100
150
200
250
300
350
0
50
100
Total Analog
AVDD_CH1+AVDD_CH2_3
Total Digital
AVDD_REF
DVDD
AVDD_PLL
Current
–
mA
f – Frequency – MHz
CURRENT
vs
FREQUENCY
Figure 5–2. Power Consumption
DVDD_PLL
f – Frequency – MHz
POWER
vs
FREQUENCY
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| THS8133ACPHP | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8133BCPHP | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8133BCPHPG4 | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8133CPHP | PARALLEL, WORD INPUT LOADING, 0.005 us SETTLING TIME, 10-BIT DAC, PQFP48 |
| THS8134BCPHP | PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS8083EVM | 制造商:Texas Instruments 功能描述:THS8083EVM - Bulk |
| THS8083T | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Triple 8-Bit, 80 MSPS, 3.3-V Video and Graphics Digitizer With Digital PLL |
| THS8-10R-D | 制造商:Thomas & Betts 功能描述:CATAMOUNT CABLE TIES |
| THS8133 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION |
| THS8133_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。